UPD78F0500MC-5A4-A Renesas Electronics America, UPD78F0500MC-5A4-A Datasheet - Page 238

• Manufacturer Part Number: UPD78F0500MC-5A4-A
• Description: MCU 8BIT FLASH SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500MC-5A4-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(7) Oscillation stabilization time counter status register (OSTC)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
This is the register that indicates the count status of the X1 clock oscillation stabilization time counter. When X1 clock
oscillation starts with the internal high-speed oscillation clock or subsystem clock used as the CPU clock, the X1 clock
oscillation stabilization time can be checked.
OSTC can be read by a 1-bit or 8-bit memory manipulation instruction.
When reset is released (reset by RESET input, POC, LVI, and WDT), the STOP instruction and MSTOP (bit 7 of MOC
register) = 1 clear OSTC to 00H.
Address: FFA3H
Symbol
OSTC
Figure 6-10. Format of Oscillation Stabilization Time Counter Status Register (OSTC)
Remark f
Cautions 1. After the above time has elapsed, the bits are set to 1 in order from MOST11 and
MOST11
7
0
1
1
1
1
1
After reset: 00H
2. The oscillation stabilization time counter counts up to the oscillation stabilization
3. The X1 clock oscillation stabilization wait time does not include the time until clock
X
: X1 clock oscillation frequency
remain 1.
time set by OSTS. If the STOP mode is entered and then released while the internal
high-speed oscillation clock is being used as the CPU clock, set the oscillation
stabilization time as follows.
Note, therefore, that only the status up to the oscillation stabilization time set by
OSTS is set to OSTC after STOP mode is released.
oscillation starts (“a” below).
MOST13
• Desired OSTC oscillation stabilization time ≤ Oscillation stabilization time set
6
0
0
1
1
1
1
by OSTS
X1 pin voltage
waveform
R
MOST14
5
0
0
0
1
1
1
STOP mode release
MOST11
MOST15
4
0
0
0
1
1
a
MOST13
MOST16
0
0
0
0
1
3
CHAPTER 6 CLOCK GENERATOR
2
2
2
2
2
MOST14
11
13
14
15
16
Oscillation stabilization time status
/f
/f
/f
/f
/f
X
X
X
X
X
2
min.
min.
min.
min.
min.
204.8
819.2
1.64 ms min. 819.2
3.27 ms min. 1.64 ms min.
6.55 ms min. 3.27 ms min.
f
X
MOST15
= 10 MHz
1
μ
μ
s min. 102.4
s min. 409.6
f
X
MOST16
= 20 MHz
0
μ
μ
μ
s min.
s min.
s min.
238