UPD78F0500MC-5A4-A Renesas Electronics America, UPD78F0500MC-5A4-A Datasheet - Page 511

• Manufacturer Part Number: UPD78F0500MC-5A4-A
• Description: MCU 8BIT FLASH SSOP
• Manufacturer: Renesas Electronics America
• Series: 78K0/Kx2r

Specifications of UPD78F0500MC-5A4-A

• Core Processor: 78K/0
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: 3-Wire SIO, I²C, LIN, UART/USART
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 23
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: *
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

78K0/Kx2
(5) SO1n output (see Figures 16-1 and 16-2)
R01UH0008EJ0401 Rev.4.01
Jul 15, 2010
The status of the SO1n output is as follows depending on the setting of CSIE1n, TRMD1n, DAP1n, and DIR1n.
Remark n = 0:
Notes 1.
Caution If a value is written to CSIE1n, TRMD1n, DAP1n, and DIR1n, the output value of SO1n
CSIE1n = 0
CSIE1n = 1
CSIE1n
2.
3.
4.
changes.
n = 0, 1: 78K0/KE2 products whose flash memory is at least 48 KB, and 78K0/KF2 products
The actual output of the SO10/P12 or SO11/P02 pin is determined according to PM12 and P12 or
PM02 and P02, as well as the SO1n output.
This is a status after reset.
To use the P12/SO10 or P02/SO11 pin as general-purpose port, set the serial clock selection
register 1n (CSIC1n) in the default status (00H).
After transmission has been completed, the SO1n pin holds the output value of the last bit of
transmission data.
Note 2
TRMD1n = 0
TRMD1n = 1
TRMD1n = 0
TRMD1n = 1
78K0/KE2 products whose flash memory is less than 32 KB, and 78K0/KB2, 78K0/KC2,
78K0/KD2 products
TRMD1n
Notes 2, 3
Note 3
Table 16-3. SO1n Output Status
DAP1n = 0
DAP1n = 1
DAP1n
CHAPTER 16 SERIAL INTERFACES CSI10 AND CSI11
−
−
−
DIR1n = 0
DIR1n = 1
DIR1n
−
−
−
−
Low level output
Low level output
Value of bit 7 of SOTB1n
Value of bit 0 of SOTB1n
Low level output
Transmission data
SO1n Output
Note 2
Note 1
Note 4
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