M30624FGAFP#U3 Renesas Electronics America, M30624FGAFP#U3 Datasheet - Page 492

• Manufacturer Part Number: M30624FGAFP#U3
• Description: IC M16C MCU FLASH 100QFP
• Manufacturer: Renesas Electronics America
• Series: M16C™ M16C/60r

Specifications of M30624FGAFP#U3

• Core Processor: M16C/60
• Core Size: 16-Bit
• Speed: 16MHz
• Connectivity: SIO, UART/USART
• Peripherals: DMA, PWM, WDT
• Number Of I /o: 85
• Program Memory Size: 256KB (256K x 8)
• Program Memory Type: FLASH
• Ram Size: 20K x 8
• Voltage - Supply (vcc/vdd): 4.2 V ~ 5.5 V
• Data Converters: A/D 10x10b, D/A 2x8b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 100-QFP
• For Use With: 867-1000 - KIT QUICK START RENESAS 62PM3062PT3-CPE-3 - EMULATOR COMPACT M16C/62P/30P
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Power Control
2.15 Power Control Usage
2.15.1 Overview of the power control usage
‘Power Control’ refers to the reduction of CPU power consumption by stopping the CPU and oscillators,
or decreasing the operation clock. The following is a description of the three available power control
modes:
(1) Modes
(2) Switching the driving capacity of the oscillation circuit
Power control is available in three modes.
(a) Normal operation mode
• High-speed mode
• Medium-speed mode
• Low-speed mode
• Low power consumption mode
(b) Wait mode
(c) Stop mode
Figure 2.15.1 is the state transition diagram of the above modes.
Both the main clock and the secondary clock have the ability to switch the driving capacity. Reducing
the driving capacity after the oscillation stabilizes allows for further reduction in power consumption.
Divide-by-1 frequency of the main clock becomes the BCLK. The CPU operates with the BCLK
selected. Each peripheral function operates according to its assigned clock.
Divide-by-2, divide-by-4, divide-by-8, or divide-by-16 frequency of the main clock becomes the
BCLK. The CPU operates according to the BCLK selected. Each peripheral function operates
according to its assigned clock.
f
secondary clock. Each peripheral function operates according to its assigned clock.
The main clock operating in low-speed mode is stopped. The CPU operates according to the fc
clock. The fc clock is supplied by the secondary clock. The only peripheral functions that operate
are those with the sub-clock selected as the count source.
The CPU operation is stopped. The oscillators do not stop.
All oscillators stop. The CPU and all built-in peripheral functions stop. This mode, among the three
modes listed here, is the most effective in decreasing power consumption.
C
becomes the BCLK. The CPU operates according to the fc clock. The f
SINGLE-CHIP 16-BIT CMOS MICROCOMPUTER
C
clock is supplied by the
M16C / 62A Group
Mitsubishi microcomputers
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