PCIMX515DJM8C Freescale Semiconductor, PCIMX515DJM8C Datasheet - Page 73

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PCIMX515DJM8C

Manufacturer Part Number
PCIMX515DJM8C
Description
MPU I.MX515 529-MABGAPGE
Manufacturer
Freescale Semiconductor
Series
i.MX51r
Datasheet

Specifications of PCIMX515DJM8C

Core Processor
ARM Cortex-A8
Core Size
32-Bit
Speed
800MHz
Connectivity
1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
Peripherals
DMA, I²S, LCD, POR, PWM, WDT
Number Of I /o
128
Program Memory Type
ROMless
Ram Size
128K x 8
Voltage - Supply (vcc/vdd)
0.8 V ~ 1.15 V
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
529-MABGA
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Program Memory Size
-
Data Converters
-
4.7.2
This section describes the timing parameters of the eCSPI. The eCSPI has separate timing parameters for
master and slave modes. The nomenclature used with the CSPI modules and the respective routing of these
signals is shown in
4.7.2.1
Figure 37
characteristics.
Freescale Semiconductor
eCSPIx_DRYN1
eCSPIx_CS_x
eCSPIx_CLK
eCSPIx_DO
eCSPIx_DI
CS10
CS11
CS1
CS2
CS3
CS4
CS5
CS6
CS7
CS8
CS9
ID
depicts the timing of eCSPI in Master mode and
eCSPI Timing Parameters
eCSPIx_CLK Cycle Time–Read
eCSPIx_CLK Cycle Time–Write
eCSPIx_CLK High or Low Time
eCSPIx_CLK Rise or Fall
eCSPIx_CS_x pulse width
eCSPIx_CS_x Lead Time (CS setup time)
eCSPIx_CS_x Lag Time (CS hold time)
eCSPIx_DO Setup Time
eCSPIx_DO Hold Time
eCSPIx_DI Setup Time
eCSPIx_DI Hold Time
eCSPIx_DRYN Setup Time
eCSPI Master Mode Timing
CS11
CS7 CS8
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
CS9 CS10
Table
CS1
64.
Table 67. eCSPI Master Mode Timing Parameters
Figure 39. eCSPI Master Mode Timing Diagram
Parameter
CS3
CS3
CS2
t
Table 65
RISE/FALL
Symbol
t
t
t
t
t
t
CS2
t
t
Smosi
Hmosi
Smiso
Hmiso
SDRY
CSLH
t
SCS
HCS
t
SW
clk
lists the eCSPI Master Mode timing
Min
CS6
60
15
15
6
5
5
5
5
5
5
5
Electrical Characteristics
CS4
Max
CS5
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
73

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