PCIMX515DJM8C Freescale Semiconductor, PCIMX515DJM8C Datasheet - Page 131

• Manufacturer Part Number: PCIMX515DJM8C
• Description: MPU I.MX515 529-MABGAPGE
• Manufacturer: Freescale Semiconductor
• Series: i.MX51r

Specifications of PCIMX515DJM8C

• Core Processor: ARM Cortex-A8
• Core Size: 32-Bit
• Speed: 800MHz
• Connectivity: 1-Wire, EBI/EMI, Ethernet, I²C, IrDA, MMC, SPI, SSI, UART/USART, USB OTG
• Peripherals: DMA, I²S, LCD, POR, PWM, WDT
• Number Of I /o: 128
• Program Memory Type: ROMless
• Ram Size: 128K x 8
• Voltage - Supply (vcc/vdd): 0.8 V ~ 1.15 V
• Oscillator Type: External
• Operating Temperature: -20°C ~ 85°C
• Package / Case: 529-MABGA
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -

4.7.15.1 SSI Transmitter Timing with Internal Clock
Figure 91
the SSI transmitter internal clock.
Freescale Semiconductor
.
AUDMUX port 6
AUDMUX port 7
depicts the SSI transmitter internal clock timing and
Note: SRXD input in synchronous mode only
TXFS (wl)
(Output)
TXFS (bl)
(Output)
•
•
Port
RXD
(Input)
TXC
(Output)
TXD
(Output)
i.MX51 Applications Processors for Consumer and Industrial Products, Rev. 4
The terms WL and BL used in the timing diagrams and tables refer to
Word Length (WL) and Bit Length (BL).
The SSI timing diagrams use generic signal names wherein the names
used in the i.MX51 Multimedia Applications Processor Reference
Manual (MCIMX51RM) are channel specific signal names. For
example, a channel clock referenced in the IOMUXC chapter as
AUD3_TXC appears in the timing diagram as TXC.
Figure 91. SSI Transmitter Internal Clock Timing Diagram
SS2
Table 101. AUDMUX Port Allocation (continued)
SS6
Signal Nomenclature
SS1
AUD6
SSI 3
SS10
SS16
SS8
NOTE
SS42
SS43
SS5
SS4
External—EIM or DISP2 via IOMUX
Internal
SS14
Table 102
SS17
Type and Access
lists the timing parameters for
SS3
SS15
SS19
SS18
Electrical Characteristics
SS12
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