DF2377RVFQ33 Renesas Electronics America, DF2377RVFQ33 Datasheet - Page 607
![IC H8S MCU FLASH 3V 384K 144LQFP](/photos/28/61/286116/144-lqfp__plqp0144kc-a_sml.jpg)
DF2377RVFQ33
Manufacturer Part Number
DF2377RVFQ33
Description
IC H8S MCU FLASH 3V 384K 144LQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2300r
Datasheet
1.YR0K42378FC000BA.pdf
(1208 pages)
Specifications of DF2377RVFQ33
Core Processor
H8S/2000
Core Size
16-Bit
Speed
33MHz
Connectivity
I²C, IrDA, SCI, SmartCard
Peripherals
DMA, POR, PWM, WDT
Number Of I /o
97
Program Memory Size
384KB (384K x 8)
Program Memory Type
FLASH
Ram Size
24K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b; D/A 6x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
144-LQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2377RVFQ33
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF2377RVFQ33V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF2377RVFQ33W
Manufacturer:
Renesas Electronics America
Quantity:
10 000
Company:
Part Number:
DF2377RVFQ33WV
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 607 of 1208
- Download datasheet (8Mb)
• PG3/CS3/RAS3/CAS *
Note:
• PG2/CS2/RAS2/RAS
Note:
Operating
mode
EXPE
CS3E
RMTS2 to
RMTS0
PG3DDR
Pin function PG3
Operating
mode
EXPE
CS2E
RMTS2 to
RMTS0
PG2DDR
Pin function PG2
The pin function is switched as shown below according to the operating mode, bit PG3DDR,
bit CS3E, and bits RMTS2 to RMTS0.
The pin function is switched as shown below according to the operating mode, bit PG2DDR,
bit CS2E, and bits RMTS2 to RMTS0.
* Not used in the H8S/2378 0.18μm F-ZTAT Group, H8S/2377, H8S/2375, and
* Not used in the H8S/2378 0.18μm F-ZTAT Group, H8S/2377, H8S/2375, and
input
input
0
0
H8S/2373.
H8S/2373.
⎯
⎯
0
0
output
output
PG3
PG2
1
1
normal space
normal space
input
input
PG3
PG2
Area 3 is in
Area 2 is in
0
0
output
output
CS3
CS2
1
1
1, 2, 4
1, 2, 4
⎯
⎯
DRAM space
DRAM space
RAS3 output
RAS2 output
Area 3 is in
Area 2 is in
⎯
⎯
1
1
DRAM * space
DRAM * space
synchronous
CAS * output
synchronous
RAS * output
Areas 2 to 5
Areas 2 to 5
are in
are in
⎯
⎯
input
input
PG3
PG2
0
0
⎯
⎯
⎯
⎯
0
0
output
output
PG3
PG2
Rev.7.00 Mar. 18, 2009 page 539 of 1136
1
1
input
input
PG3
PG2
0
0
⎯
⎯
0
0
output
output
PG3
PG2
1
1
normal space
normal space
input
input
PG3
PG2
Area 3 is in
Area 2 is in
0
0
7
7
output
output
CS3
CS2
1
1
Section 10 I/O Ports
1
1
DRAM space
DRAM space
REJ09B0109-0700
RAS3 output CAS * output
RAS2 output RAS * output
Area 3 is in
Area 2 is in
⎯
⎯
1
1
DRAM * space
DRAM * space
synchronous
synchronous
Areas 2 to 5
Areas 2 to 5
are in
are in
⎯
⎯
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