HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 23
Manufacturer Part Number
IC H8S MCU FLASH 256K 120-TQFP
Renesas Electronics America
1.D12312SVTE25V.pdf (341 pages)
Specifications of HD64F2633RTE28
I²C, IrDA, SCI, SmartCard
DMA, POR, PWM, WDT
Number Of I /o
Program Memory Size
256KB (256K x 8)
Program Memory Type
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
A/D 16x10b; D/A 4x8b
-20°C ~ 75°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Stack Structure: When the program counter (PC) is pushed onto the stack in a subroutine call,
and the PC, condition-code register (CCR), and extended control register (EXR) are pushed onto
the stack in exception handling, they are stored as shown in figure 1.3. When EXR is invalid, it is
not pushed onto the stack. For details, see the relevant hardware manual.
(2) Advanced Mode
In advanced mode the data address space is larger than for the H8/300H CPU.
Address Space: The 4-Gbyte maximum address space provides linear access to a maximum
16 Mbytes of program code and maximum 4 Gbytes of data.
Extended Registers (En): The extended registers (E0 to E7) can be used as 16-bit registers, or as
the upper 16-bit segments of 32-bit registers or address registers.
Instruction Set: All instructions and addressing modes can be used.
(a) Subroutine Branch
When EXR is not used it is not stored on the stack.
SP when EXR is not used.
Ignored on return.
Figure 1.3 Stack Structure in Normal Mode
Rev. 4.00 Feb 24, 2006 page 7 of 322
(b) Exception Handling
Section 1 CPU