HD64F2633RTE28 Renesas Electronics America, HD64F2633RTE28 Datasheet - Page 170
Manufacturer Part Number
IC H8S MCU FLASH 256K 120-TQFP
Renesas Electronics America
Specifications of HD64F2633RTE28
I²C, IrDA, SCI, SmartCard
DMA, POR, PWM, WDT
Number Of I /o
Program Memory Size
256KB (256K x 8)
Program Memory Type
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
A/D 16x10b; D/A 4x8b
-20°C ~ 75°C
Package / Case
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Section 2 Instruction Descriptions
MULXU (MULtiply eXtend as Unsigned)
MULXU.W Rs, ERd
This instruction multiplies the lower 16 bits of a 32-bit register ERd (destination operand) by the
contents of a 16-bit register Rs (source operand) as unsigned data and stores the result in the 32-bit
register ERd. Rs can be the upper part (Ed) or lower part (Rd) of ERd. The operation performed is
ERd: ER0 to ER7
Operand Format and Number of States Required for Execution
Note: * The number of states in the H8S/2000 CPU is 20.
Rev. 4.00 Feb 24, 2006 page 154 of 322
R0 to R7, E0 to E7
A maximum of three additional states are required for execution of this instruction within three states
after execution of a MAC instruction. For example, if there is a one-state instruction (such as NOP)
between the MAC instruction and this instruction, this instruction will be two states longer.
The number of states may differ depending on the product. For details, refer to the relevant
microcontroller hardware manual of the product in question.
32 bits unsigned multiplication.
H: Previous value remains unchanged.
N: Previous value remains unchanged.
Z: Previous value remains unchanged.
V: Previous value remains unchanged.
C: Previous value remains unchanged.