MCF5235CVM150J Freescale Semiconductor, MCF5235CVM150J Datasheet - Page 34

• Manufacturer Part Number: MCF5235CVM150J
• Description: IC MCU 64K 150MHZ 256MAPBGA
• Manufacturer: Freescale Semiconductor
• Series: MCF523xr

Specifications of MCF5235CVM150J

• Core Processor: Coldfire V2
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: CAN, EBI/EMI, Ethernet, I²C, SPI, UART/USART
• Peripherals: DMA, WDT
• Number Of I /o: 97
• Program Memory Type: ROMless
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.4 V ~ 1.6 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 256-MAPBGA
• Processor Series: MCF523x
• Core: ColdFire V2
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: CAN, I2C, UART, Ethernet, SPI
• Maximum Clock Frequency: 150 MHz
• Number Of Timers: 4
• Operating Supply Voltage: 1.4 V to 1.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: JLINK-CF-BDM26, EWCF
• Development Tools By Supplier: NNDK-MOD5234-KIT
• Minimum Operating Temperature: - 40 C
• Program Memory Size: 64 KB
• Cpu Speed: 150MHz
• Embedded Interface Type: CAN, EMI, ETHERNET, I2C, SPI, UART, USB
• Digital Ic Case Style: MAPBGA
• No. Of Pins: 256
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details

Electrical Characteristics
Figure 14
34
1
SD_SRAS
SD_CAS
RAS[1:0]
CAS[3:0]
SD_CKE
NUM
D7
D8
D7 and D8 are for write cycles only.
D[31:0]
D1
D2
D3
D4
D5
D6
SDWE
A[23:0]
1
1
shows an SDRAM read cycle.
1
D2
D1
DACR[CASL] = 2
CLKOUT high to SDRAM address valid
CLKOUT high to SDRAM control valid
CLKOUT high to SDRAM address invalid
CLKOUT high to SDRAM control invalid
SDRAM data valid to CLKOUT high
CLKOUT high to SDRAM data invalid
CLKOUT high to SDRAM data valid
CLKOUT high to SDRAM data invalid
1
0
ACTV
D4
D2
MCF523x Integrated Microprocessor Hardware Specification, Rev. 4
Row
1
2
NOP
D2
Characteristic
D3
3
Figure 14. SDRAM Read Cycle
4
Table 13. SDRAM Timing
D4
READ
5
6
NOP
7
8
NOP
Column
D2
9
t
Symbol
t
CHDDVW
t
t
t
CHDDIW
t
t
t
CHDCV
DDVCH
CHDAV
CHDCI
CHDDI
CHDAI
D5
10
PALL
11
Min
1.5
1.5
1.5
1.5
12
—
—
—
4
D4
D4
D6
Freescale Semiconductor
13
Max
—
—
—
—
—
14
9
9
9
15
Unit
ns
ns
ns
ns
ns
ns
ns
ns