DF2238RTF6 Renesas Electronics America, DF2238RTF6 Datasheet - Page 189
DF2238RTF6
Manufacturer Part Number
DF2238RTF6
Description
MCU 2.2/3V 256K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8S/2200r
Datasheet
1.DF2238RFA6V.pdf
(1048 pages)
Specifications of DF2238RTF6
Core Processor
H8S/2000
Core Size
16-Bit
Speed
6MHz
Connectivity
I²C, SCI, SmartCard
Peripherals
POR, PWM, WDT
Number Of I /o
72
Program Memory Size
256KB (256K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
2.2 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Other names
HD64F2238RTF6
HD64F2238RTF6
HD64F2238RTF6
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
DF2238RTF6V
Manufacturer:
Renesas Electronics America
Quantity:
10 000
- Current page: 189 of 1048
- Download datasheet (6Mb)
5.1
This LSI controls interrupts with the interrupt controller. The interrupt controller has the following
features:
• Two interrupt control modes
• Priorities settable with IPR
• Independent vector addresses
• Nine external interrupts
• DTC and DMAC* control
Note: * Supported only by the H8S/2239 Group.
⎯ Any of two interrupt control modes can be set by means of the INTM1 and INTM0 bits in
⎯ An interrupt priority register (IPR) is provided for setting interrupt priorities. Eight priority
⎯ All interrupt sources are assigned independent vector addresses, making it unnecessary for
⎯ NMI is the highest-priority interrupt, and is accepted at all times. Rising edge or falling
⎯ The DTC and DMAC* can be activated by an interrupt request.
the system control register (SYSCR).
levels can be set for each module for all interrupts except NMI. NMI is assigned the
highest priority level of 8, also accepted (using nesting) during interrupt processing.
Additionally accepted during state 12 if Opcode = H'57F3.
the source to be identified in the interrupt handling routine.
edge can be selected for NMI. Falling edge, rising edge, or both edge detection, or level
sensing, can be independently selected for IRQ7 to IRQ0.
Features
Section 5 Interrupt Controller
Rev. 6.00 Mar. 18, 2010 Page 127 of 982
Section 5 Interrupt Controller
REJ09B0054-0600
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