HD6413008VX25 Renesas Electronics America, HD6413008VX25 Datasheet - Page 442
![MCU 5V 0K 100-TQFP](/photos/28/61/286123/100-tqfp__100-vqfp_sml.jpg)
HD6413008VX25
Manufacturer Part Number
HD6413008VX25
Description
MCU 5V 0K 100-TQFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Hr
Datasheet
1.D13008VFBL25V.pdf
(688 pages)
Specifications of HD6413008VX25
Core Processor
H8/300H
Core Size
16-Bit
Speed
25MHz
Connectivity
SCI, SmartCard
Peripherals
PWM, WDT
Number Of I /o
35
Program Memory Type
ROMless
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 2x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
100-TQFP, 100-VQFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
Program Memory Size
-
Other names
HD6413008VTE25
HD6413008VTE25
HD6413008VTE25
- Current page: 442 of 688
- Download datasheet (4Mb)
13. Smart Card Interface
13.3.5
Only an internal clock generated by the on-chip baud rate generator can be used as the
transmit/receive clock for the smart card interface. The bit rate is set with the bit rate register
(BRR) and the CKS1 and CKS0 bits in the serial mode register (SMR). The equation for
calculating the bit rate is shown below. Table 13.5 shows some sample bit rates.
If clock output is selected with CKE0 set to 1, a clock with a frequency of 372 times the bit rate is
output from the SCK pin.
where, N: BRR setting (0 ≤ N ≤ 255)
Table 13.4 n-Values of CKS1 and CKS0 Settings
n
0
1
2
3
Note: If the gear function is used to divide the clock frequency, use the divided frequency to
Table 13.5 Bit Rates (bits/s) for Various BRR Settings (When n = 0)
N
0
1
2
Note: Bit rates are rounded off to two decimal places.
Rev.4.00 Aug. 20, 2007 Page 396 of 638
REJ09B0395-0400
7.1424
9600.0
4800.0
3200.0
B: Bit rate (bit/s)
φ: Operating frequency (MHz)
n: See table 13.4
calculate the bit rate. The equation above applies directly to 1/1 frequency division.
B =
Clock
1488 × 2
10.00
13440.9 14400.0 17473.1 19200.0 21505.4 24193.5 26881.7 33602.2
6720.4
4480.3
CKS1
0
1
2n−1
φ
10.7136 13.00
7200.0
4800.0
× (N + 1)
CKS0
0
1
0
1
8736.6
5824.4
× 10
6
14.2848 16.00
9600.0
6400.0
φ (MHz)
10752.7 12096.8 13440.9 16801.1
7168.5
18.00
8064.5
20.00
8960.6
25.00
11200.7
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