HD64F3642AH Renesas Electronics America, HD64F3642AH Datasheet - Page 321

• Manufacturer Part Number: HD64F3642AH
• Description: IC H8 MCU FLASH 16K 64QFP
• Manufacturer: Renesas Electronics America
• Series: H8® H8/300Lr

Specifications of HD64F3642AH

• Core Processor: H8/300L
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI
• Peripherals: PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 8x8b
• Oscillator Type: Internal
• Operating Temperature: -20°C ~ 75°C
• Package / Case: 64-QFP
• Lead Free Status / RoHS Status: Contains lead / RoHS non-compliant
• Eeprom Size: -

Bit 2 Transmit End Interrupt Enable (TEIE): Bit 2 selects enabling or disabling of the
transmit end interrupt request (TEI) if there is no valid transmit data in TDR when MSB data is to
be sent.
Bit 2: TEIE
0
1
Note:
Bits 1 and 0 Clock Enable 1 and 0 (CKE1, CKE0): Bits 1 and 0 select the clock source and
enabling or disabling of clock output from the SCK
pin functions as an I/O port, a clock output pin, or a clock input pin.
The CKE0 bit setting is only valid in case of internal clock operation (CKE1 = 0) in asynchronous
mode. In synchronous mode, or when external clock operation is used (CKE1 = 1), bit CKE0
should be cleared to 0.
After setting bits CKE1 and CKE0, set the operating mode in the serial mode register (SMR).
For details on clock source selection, see table 10.10 in 10.3.3, Operation.
Bit 1: CKE1
0
1
Notes: 1. Initial value
* TEI can be released by clearing bit TDRE to 0 and clearing bit TEND to 0 in SSR, or by
2. A clock with the same frequency as the bit rate is output.
3. Input a clock with a frequency 16 times the bit rate.
clearing bit TEIE to 0.
Bit 0: CKE0
0
1
0
1
Transmit end interrupt request (TEI) disabled
Transmit end interrupt request (TEI) enabled *
Description
Communication Mode
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
Asynchronous
Synchronous
3
pin. These bits determine whether the SCK
Section 10 Serial Communication Interface
Rev. 6.00 Sep 12, 2006 page 299 of 526
Description
Clock Source
Internal clock
Internal clock
Internal clock
Reserved
External clock
External clock
Reserved
Reserved
SCK
I/O port *
Serial clock output *
Clock output *
Clock input *
Serial clock input
REJ09B0326-0600
3
Pin Function
(initial value)
1
3
2
3
1