HD64F3642AH Renesas Electronics America, HD64F3642AH Datasheet - Page 296
HD64F3642AH
Manufacturer Part Number
HD64F3642AH
Description
IC H8 MCU FLASH 16K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD64F3644HV.pdf
(551 pages)
Specifications of HD64F3642AH
Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Section 9 Timers
9.6.3
The watchdog timer has an 8-bit counter (TCW) that is incremented by clock input ( /8192).
When TCSRWE = 1 in TCSRW, if 0 is written in B2WI and 1 is simultaneously written in
WDON, TCW starts counting up (two write accesses to TCSRW are necessary in order to operate
the watchdog timer). When the TCW count value reaches H'FF, the next clock input causes the
watchdog timer to overflow and generates an internal reset signal. The internal reset signal is
output for 512 clock cycles of the
count up from the written value. The overflow period can be set in the range from 1 to 256 input
clocks, depending on the value written in TCW.
Figure 9.36 shows an example of watchdog timer operations.
Example:
The value set in TCW should therefore be 256 – 15 = 241 (H'F1).
Rev. 6.00 Sep 12, 2006 page 274 of 526
REJ09B0326-0600
Internal reset
signal
TCW count
value
H'FF
H'00
Timer Operation
4
8192
= 4 MHz and the desired overflow period is 30 ms.
10
Figure 9.36 Typical Watchdog Timer Operations (Example)
H'F1
6
H'F1 written
in TCW
30
10
–3
Start
= 14.6
OSC
clock. It is possible to write to TCW, causing TCW to
H'F1 written in TCW
512
OSC
Reset
TCW overflow
clock cycles
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