HD64F3642AH Renesas Electronics America, HD64F3642AH Datasheet - Page 113
HD64F3642AH
Manufacturer Part Number
HD64F3642AH
Description
IC H8 MCU FLASH 16K 64QFP
Manufacturer
Renesas Electronics America
Series
H8® H8/300Lr
Datasheet
1.HD64F3644HV.pdf
(551 pages)
Specifications of HD64F3642AH
Core Processor
H8/300L
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI
Peripherals
PWM, WDT
Number Of I /o
53
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-20°C ~ 75°C
Package / Case
64-QFP
Lead Free Status / RoHS Status
Contains lead / RoHS non-compliant
Eeprom Size
-
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Bits 6 to 4 Standby Timer Select 2 to 0 (STS2 to STS0): These bits designate the time the
CPU and peripheral modules wait for stable clock operation after exiting from standby mode or
watch mode to active mode due to an interrupt. The designation should be made according to the
clock frequency so that the waiting time is at least 10 ms.
Bit 6: STS2
0
1
Legend: * Don’t care
Bit 3 Low Speed on Flag (LSON): This bit chooses the system clock ( ) or subclock (
the CPU operating clock when watch mode is cleared. The resulting operation mode depends on
the combination of other control bits and interrupt input.
Bit 3: LSON
0
1
Bits 2 Reserved Bits: Bit 2 is reserved: it is always read as 1 and cannot be modified.
Bits 1 and 0 Active (Medium-Speed) Mode Clock Select (MA1, MA0): Bits 1 and 0 choose
sleep (medium-speed) mode. MA1 and MA0 should be written in active (high-speed) mode or
subactive mode.
Bit 1: MA1
0
1
osc
/128,
osc
/64,
Bit 5: STS1
0
1
*
osc
The CPU operates on the system clock ( )
The CPU operates on the subclock (
Bit 0: MA0
0
1
0
1
Description
/32, or
osc
/16 as the operating clock in active (medium-speed) mode and
Bit 4: STS0
0
1
0
1
*
Description
osc
osc
osc
osc
/16
/32
/64
/128
Description
Wait time = 8,192 states
Wait time = 16,384 states
Wait time = 32,768 states
Wait time = 65,536 states
Wait time = 131,072 states
SUB
Rev. 6.00 Sep 12, 2006 page 91 of 526
)
Section 5 Power-Down Modes
REJ09B0326-0600
(initial value)
(initial value)
(initial value)
SUB
) as
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