R5F21217JFP#U1 Renesas Electronics America, R5F21217JFP#U1 Datasheet - Page 493

• Manufacturer Part Number: R5F21217JFP#U1
• Description: MCU FLASH 48K 2.5K CMOS 48LQFP
• Manufacturer: Renesas Electronics America
• Series: R8C/2x/21r

Specifications of R5F21217JFP#U1

• Core Processor: R8C
• Core Size: 16/32-Bit
• Speed: 20MHz
• Connectivity: I²C, LIN, SIO, SSU, UART/USART
• Peripherals: POR, Voltage Detect, WDT
• Number Of I /o: 41
• Program Memory Size: 48KB (48K x 8)
• Program Memory Type: FLASH
• Ram Size: 2.5K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Data Converters: A/D 12x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -

Rev.
1.00
REVISION HISTORY
Nov 15, 2006
Date
Page
169
183
186
187
196
199
202
203
208
212
218
Figure 14.35 Registers TRDSTR and TRDMR in Input Capture Function →
FIgure 14.32 Registers TRDSTR and TRDMR in Input Capture Function
replaced.
Timer RD Start Register
revised.
“TRD1 count start bit” → “TRD1 count start flag” revised.
Figure 14.49 Registers TRDSTR and TRDMR in Output Compare Function →
Figure 14.46 Registers TRDSTR and TRDMR in Output Compare Function
replaced.
Timer RD Start Register
revised.
Figure 14.52 Registers TRDOER1 to TRDOER2 in Output Compare Function →
Figure 14.49 Registers TRDOER1 to TRDOER2 in Output Compare Function
replaced.
Figure 14.50 TRDOCR Register in Output Compare Function → Figure 14.50
TRDOCR Register in Output Compare Function replaced.
NOTE2 added.
On the first line; “Figure 14.63 ~” → “Figure 14.60 lists ~” corrected.
Figure 14.65 TRDSTR Register in PWM Mode → Figure 14.62 TRDSTR
Register in PWM Mode replaced.
corrected.
Figure 14.68 Registers TRDOER1 to TRDOER2 in PWM Mode → Figure 14.65
Registers TRDOER1 to TRDOER2 in PWM Mode replaced.
Figure 14.69 Registers TRDOCR and TRDCR0 to TRDCR1 in PWM Mode →
Figure 14.66 Registers TRDOCR and TRDCR0 to TRDCR1 in PWM Mode
replaced.
Figure 14.75 Operating Example of PWM Mode → Figure 14.72 Operating
Example of PWM Mode replaced.
Figure 14.72 revised.
Figure 14.78 TRDSTR Register in Reset Synchronous PWM Mode → Figure
14.75 TRDSTR Register in Reset Synchronous PWM Mode replaced.
flag
Table 14.30 TRDGRji Register Functions in Reset Synchronous PWM Mode;
TRDGRA0 register; “(Output inversed every half period of TRDIOC0 pin)” →
“(Output inversed every period of TRDIOC0 and PWM pins)”,
TRDGRC0 register; “(Output inversed every half period of TRDIOC0 pin)” →
“(Output inversed every period of TRDIOC0 and PWM pins)” revised.
“TRD1 count start bit
Timer RD Output Master Enable Register 1 revised.
Timer RD Star Register
“TRD1 count start bit
Timer RD Output Control Register
“TRDi count start bit
Timer RD Start Register
R8C/20 Group, R8C/21 Group Hardware Manual
(4)
” corrected.
C - 17
(5)
(5)
(5)
” → “TRD1 count start flag
” → “TRD1 count start flag
(1)
(1)
(1)
→ “TRD1 count start flag
(1)
; “TRD0 count start bit
; “TRD0 count start bit
; “TRD0 count start bit” → “TRD0 count start flag”
; “TRD0 count start bit
Description
Summary
(1)
; NOTE2 added.
(4)
(4)
(5)
(5)
(4)
” → “TRD0 count start flag
” → “TRD0 count start flag
(5)
” revised.
” corrected.
” → “TRD0 count start
” corrected.
(4)
(4)
”
”