MC9S08RG60CFGE Freescale Semiconductor, MC9S08RG60CFGE Datasheet - Page 71

• Manufacturer Part Number: MC9S08RG60CFGE
• Description: IC MCU 60K FLASH 8MHZ 44LQFP
• Manufacturer: Freescale Semiconductor
• Series: HCS08r

Specifications of MC9S08RG60CFGE

• Core Processor: HCS08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 39
• Program Memory Size: 60KB (60K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 44-LQFP
• Processor Series: S08RG
• Core: HCS08
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: SCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 39
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWS08
• Development Tools By Supplier: DEMO9S08RG60E
• Minimum Operating Temperature: - 40 C
• Controller Family/series: HCS08
• No. Of I/o's: 39
• Ram Memory Size: 60KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• For Use With: DEMO9S08RG60E - BOARD DEMO S08RG/RC/RD/RE FAMILY
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

5.8.7
1. This bit can be written only one time after reset. Additional writes are ignored.
Freescale Semiconductor
LVDACK
LVDRE
Any other
LVDIE
SAFE
Field
LVDF
7
6
5
4
3
reset:
POR:
W
R
System Power Management Status and Control 1 Register
(SPMSC1)
Low-Voltage Detect Flag — Provided LVDE = 1, this read-only status bit indicates a low-voltage detect error.
Low-Voltage Detect Acknowledge — This write-only bit is used to acknowledge low voltage detection errors
(write 1 to clear LVDF). Reads always return logic 0.
Low-Voltage Detect Interrupt Enable — This read/write bit enables hardware interrupt requests for LVDF.
0 Hardware interrupt disabled (use polling).
1 Request a hardware interrupt when LVDF = 1.
SAFE System from interrupts — This read/write bit enables hardware to block interrupts and resets from
waking the MCU from stop mode while the supply voltage V
description see
0 Enable pending interrupts and resets
1 Interrupts and resets are blocked while supply voltage is below re-arm voltage
Low-Voltage Detect Reset Enable — This bit enables the LVD reset function. This bit can be written only once
after a reset and additional writes have no meaning or effect. It is set following a POR and is unaffected by any
other resets, including an LVD reset.
0 LVDF does not generate hardware resets.
1 Force an MCU reset when LVDF = 1.
Figure 5-9. System Power Management Status and Control 1 Register (SPMSC1)
LVDF
0
0
7
= Unimplemented or Reserved
LVDACK
Section 5.6.3, “LVD Interrupt and Safe State
6
0
0
0
MC9S08RC/RD/RE/RG Data Sheet, Rev. 1.11
Table 5-10. SPMSC1 Field Descriptions
LVDIE
0
0
5
SAFE
4
0
0
Description
LVDRE
DD
Operation”
1
u
3
is below the V
(1)
Resets, Interrupts, and System Configuration
u = Unaffected by reset
REARM
2
0
0
0
voltage. For a more detailed
0
0
0
1
0
0
0
0
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