MC908GR32AVFAE Freescale Semiconductor, MC908GR32AVFAE Datasheet - Page 4

• Manufacturer Part Number: MC908GR32AVFAE
• Description: IC MCU 8BIT 32K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR32AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1.5KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Revision History
The following revision history table summarizes changes contained in this document. For your
convenience, the page number designators have been linked to the appropriate location.
Revision History
4
March, 2006
June, 2005
April, 2004
April, 2007
July, 2004
July, 2006
Date
Revision
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Level
N/A
1
2
3
4
5
Initial release
9.7.3 Keyboard Interrupt Polarity Register — Corrected description of
KBIP7–KBIP0.
Table 13-6. ESCI LIN Control Bits — Corrected Functionality definitions
13.9.1 ESCI Arbiter Control Register — Corrected definition for ACLK bit.
13.9.3 Bit Time Measurement — Corrected description of ACLK bit.
10.5 Clock Generator Module (CGM) — Updated description to remove
erroneous information.
Added 1.5.15 Unused Pin Termination
12.1 Introduction — Replaced note
Table 13-6. ESCI LIN Control Bits — Corrected functionality column.
The following sections were updated to show that a break interrupt inhibits
input captures:
Figure 19-10. Normal Monitor Mode Circuit and Figure 19-11. Forced Monitor
Mode — Changed capacitor values
20.5 5.0-Vdc Electrical Characteristics — Updated minimum value for
low-voltage inhibit, trip rising voltage (V
20.9.1 CGM Component Specifications — Updated values for feedback bias
resistor
Figure 2-2. Control, Status, and Data Registers
with TMBCLKSEL to be compatible with development tool nomenclature
Chapter 5 Configuration Register (CONFIG)
CGMXCLK
10.6.2 Stop Mode
Figure 13-3. ESCI Module Block Diagram
Clock and deleted reference to 4x BUSCLK
13.4.2 Transmitter
13.9.1 ESCI Arbiter Control Register
Replaced one quarter with one half in the definition for ACLK = 1
Chapter 16 Timebase Module (TBM)
TMBCLKSEL to be compatible with development tool nomenclature
20.5 5.0-Vdc Electrical Characteristics
Characteristics
20.9 Clock Generation Module (CGM) Characteristics
include the following:
17.6 TIM1 During Break Interrupts
18.6 TIM2 During Break Interrupts
19.2.1.2 TIM During Break Interrupts
20.9.1 CGM Operating Conditions
20.9.2 CGM Component Information
20.9.3 CGM Acquisition/Lock Time Information
— Updated tables
— Replaced COPCLK with CGMXCLK
— Changed ESCIBDSRC to SCIBDSRC
Description
and
— Replaced TBMCLKSEL with
and
TRIPR
13.9.3 Bit Time Measurement
— Changed BUS_CLK to Bus
20.6 3.3-Vdc Electrical
).
— Replaced COPCLK with
— Replaced TBMCLKSEL
— Updated section to
Freescale Semiconductor
—
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