MC908GR32AVFAE Freescale Semiconductor, MC908GR32AVFAE Datasheet - Page 254
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MC908GR32AVFAE
Manufacturer Part Number
MC908GR32AVFAE
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR32ACFJE.pdf
(314 pages)
Specifications of MC908GR32AVFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1.5KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR32AVFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Timer Interface Module (TIM2)
18.8.2 TIM2 Counter Registers
The two read-only TIM2 counter registers contain the high and low bytes of the value in the TIM2 counter.
Reading the high byte (T2CNTH) latches the contents of the low byte (T2CNTL) into a buffer. Subsequent
reads of T2CNTH do not affect the latched T2CNTL value until T2CNTL is read. Reset clears the TIM2
counter registers. Setting the TIM2 reset bit (TRST) also clears the TIM2 counter registers.
18.8.3 TIM2 Counter Modulo Registers
The read/write TIM2 modulo registers contain the modulo value for the TIM2 counter. When the TIM2
counter reaches the modulo value, the overflow flag (TOF) becomes set, and the TIM2 counter resumes
counting from $0000 at the next timer clock. Writing to the high byte (T2MODH) inhibits the TOF bit and
overflow interrupts until the low byte (T2MODL) is written. Reset sets the TIM2 counter modulo registers.
254
Address: $002C
Address: $002D
Address: $002E
Address: $002F
If T2CNTH is read during a break interrupt, be sure to unlatch T2CNTL by
reading T2CNTL before exiting the break interrupt. Otherwise, T2CNTL
retains the value latched during the break.
Reset the TIM2 counter before writing to the TIM2 counter modulo registers.
Figure 18-7. TIM2 Counter Modulo Registers (T2MODH and T2MODL)
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Figure 18-6. TIM2 Counter Registers (T2CNTH and T2CNTL)
BIT 15
BIT 15
BIT 7
BIT 7
Bit 7
Bit 7
Bit 7
Bit 7
0
0
1
1
T2CNTH
T2CNTL
T2MODH
T2MODL
= Unimplemented
BIT 14
BIT 14
BIT 6
BIT 6
6
0
6
0
6
1
6
1
BIT 13
BIT 13
BIT 5
BIT 5
5
0
5
0
5
1
5
1
NOTE
NOTE
BIT 12
BIT 12
BIT 4
BIT 4
4
0
4
0
4
1
4
1
BIT 11
BIT 11
BIT 3
BIT 3
3
0
3
0
3
1
3
1
BIT 10
BIT 10
BIT 2
BIT 2
2
0
2
0
2
1
2
1
BIT 9
BIT 1
BIT 9
BIT 1
1
0
1
0
1
1
1
1
Freescale Semiconductor
BIT 8
BIT 0
BIT 0
BIT 8
Bit 0
Bit 0
Bit 0
Bit 0
0
0
1
1
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