MC908GR32AVFAE Freescale Semiconductor, MC908GR32AVFAE Datasheet - Page 290
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MC908GR32AVFAE
Manufacturer Part Number
MC908GR32AVFAE
Description
IC MCU 8BIT 32K FLASH 48-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC908GR32ACFJE.pdf
(314 pages)
Specifications of MC908GR32AVFAE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
LVD, POR, PWM
Number Of I /o
37
Program Memory Size
32KB (32K x 8)
Program Memory Type
FLASH
Ram Size
1.5K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 24x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
48-LQFP
Controller Family/series
HC08
No. Of I/o's
37
Ram Memory Size
1.5KB
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Processor Series
HC08GR
Core
HC08
Data Bus Width
8 bit
Data Ram Size
1.5 KB
Interface Type
ESCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Maximum Operating Temperature
+ 105 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 24 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MC908GR32AVFAE
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
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Electrical Specifications
290
SPSCK OUTPUT
SPSCK OUTPUT
SPSCK OUTPUT
SPSCK OUTPUT
Note: This first clock edge is generated internally, but is not seen at the SPSCK pin.
Note: This last clock edge is generated internally, but is not seen at the SPSCK pin.
CPOL = 1
CPOL = 0
CPOL = 0
CPOL = 1
OUTPUT
OUTPUT
INPUT
INPUT
INPUT
INPUT
MISO
MOSI
MISO
MOSI
SS
SS
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
10
NOTE
NOTE
SS PIN OF MASTER HELD HIGH
SS PIN OF MASTER HELD HIGH
4
5
MASTER MSB OUT
MSB IN
MASTER MSB OUT
Figure 20-2. SPI Master Timing
MSB IN
1
a) SPI Master Timing (CPHA = 0)
b) SPI Master Timing (CPHA = 1)
5
4
11
4
5
11
1
5
4
BITS 6–1
BITS 6–1
BITS 6–1
BITS 6–1
10
10
6
MASTER LSB OUT
6
MASTER LSB OUT
LSB IN
LSB IN
Freescale Semiconductor
7
7
11
NOTE
NOTE
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