MC908GR32AVFAE Freescale Semiconductor, MC908GR32AVFAE Datasheet - Page 235

• Manufacturer Part Number: MC908GR32AVFAE
• Description: IC MCU 8BIT 32K FLASH 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR32AVFAE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1.5KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

PS[2:0] — Prescaler Select Bits
17.8.2 TIM1 Counter Registers
The two read-only TIM1 counter registers contain the high and low bytes of the value in the TIM1 counter.
Reading the high byte (T1CNTH) latches the contents of the low byte (T1CNTL) into a buffer. Subsequent
reads of T1CNTH do not affect the latched T1CNTL value until T1CNTL is read. Reset clears the TIM1
counter registers. Setting the TIM1 reset bit (TRST) also clears the TIM1 counter registers.
Freescale Semiconductor
These read/write bits select one of the seven prescaler outputs as the input to the TIM1 counter as
Table 17-1
Address: $0021
Address: $0022
shows. Reset clears the PS[2:0] bits.
If you read T1CNTH during a break interrupt, be sure to unlatch T1CNTL
by reading T1CNTL before exiting the break interrupt. Otherwise, T1CNTL
retains the value latched during the break.
Reset:
Reset:
Read:
Read:
Write:
Write:
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
PS2
0
0
0
0
1
1
1
1
Figure 17-6. TIM1 Counter Registers (T1CNTH:T1CNTL)
Bit 15
Bit 7
Bit 7
Bit 7
0
0
PS1
0
0
1
1
0
0
1
1
T1CNTH
T1CNTL
= Unimplemented
Bit 14
Bit 6
6
0
6
0
Table 17-1. Prescaler Selection
PS0
Bit 13
Bit 5
0
1
0
1
0
1
0
1
5
0
5
0
NOTE
Bit 12
Bit 4
4
0
4
0
Bit 11
Bit 3
Internal bus clock ÷ 16
Internal bus clock ÷ 32
Internal bus clock ÷ 64
3
0
3
0
Internal bus clock ÷ 1
Internal bus clock ÷ 2
Internal bus clock ÷ 4
Internal bus clock ÷ 8
TIM1 Clock Source
Not available
Bit 10
Bit 2
2
0
2
0
Bit 9
Bit 1
1
0
1
0
Input/Output Registers
Bit 0
Bit 8
Bit 0
Bit 0
0
0
235