MC908GR32ACFAER Freescale Semiconductor, MC908GR32ACFAER Datasheet - Page 244

• Manufacturer Part Number: MC908GR32ACFAER
• Description: IC MCU 32K FLASH 8MHZ 48-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908GR32ACFAER

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: SCI, SPI
• Peripherals: LVD, POR, PWM
• Number Of I /o: 37
• Program Memory Size: 32KB (32K x 8)
• Program Memory Type: FLASH
• Ram Size: 1.5K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-LQFP
• Controller Family/series: HC08
• No. Of I/o's: 37
• Ram Memory Size: 1.5KB
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Processor Series: HC08GR
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 1.5 KB
• Interface Type: ESCI, SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 53
• Number Of Timers: 8
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, DEMO908GZ60E, M68CBL05CE, M68EML08GPGTE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 24 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Timer Interface Module (TIM2)
244
$002C
$002D
$002B
$002E
$002F
$0030
$0031
$0032
$0033
$0034
$0035
$0456
Addr.
TIM2 Channel 0 Register High
TIM2 Channel 1 Register High
TIM2 Channel 0 Register Low
TIM2 Channel 1 Register Low
TIM2 Counter Register High
TIM2 Counter Register Low
TIM2 Modulo Register High
TIM2 Channel 0 Status and
TIM2 Channel 1 Status and
TIM2 Channel 2 Status and
TIM2 Modulo Register Low
Control Register (T2SC0)
Control Register (T2SC1)
Control Register (T2SC2)
TIM2 Status and Control
Register Name
MC68HC908GR60A • MC68HC908GR48A • MC68HC908GR32A Data Sheet, Rev. 5
Register (T2SC)
See page 252.
See page 254.
See page 254.
See page 254.
See page 254.
See page 255.
See page 258.
See page 258.
See page 255.
See page 258.
See page 258.
See page 255.
(T2MODH)
(T2MODL)
(T2CNTH)
(T2CH0H)
(T2CH1H)
(T2CNTL)
(T2CH0L)
(T2CH1L)
Figure 18-3. TIM2 I/O Register Summary (Sheet 1 of 2)
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Reset:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Read:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Write:
Bit 15
Bit 15
CH0F
Bit 15
CH1F
Bit 15
CH2F
Bit 7
TOF
Bit 7
Bit 7
Bit 7
Bit 7
0
0
0
0
1
1
0
0
0
0
0
0
= Unimplemented
CH0IE
CH1IE
CH2IE
TOIE
14
14
14
14
6
0
0
6
0
1
6
1
0
6
0
6
0
TSTOP
MS0B
MS2B
13
13
13
13
5
1
0
5
0
1
5
1
0
5
0
0
5
0
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
Indeterminate after reset
TRST
MS0A
MS1A
MS2A
12
12
12
12
4
0
0
0
4
0
1
4
1
0
4
0
4
0
ELS0B
ELS1B
ELS2B
11
11
11
11
3
0
0
0
3
0
1
3
1
0
3
0
3
0
ELS0A
ELS1A
ELS2A
PS2
10
10
10
10
2
0
0
2
0
1
2
1
0
2
0
2
0
Freescale Semiconductor
TOV0
TOV1
TOV2
PS1
1
0
9
0
1
0
9
1
1
1
0
9
1
0
9
1
0
CH0MAX
CH2MAX
CH1MAX
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
Bit 8
Bit 0
PS0
0
0
0
1
1
0
0
0