MC908LJ12CFBE Freescale Semiconductor, MC908LJ12CFBE Datasheet - Page 76

• Manufacturer Part Number: MC908LJ12CFBE
• Description: IC MCU 12K FLASH 8MHZ 52-LQFP
• Manufacturer: Freescale Semiconductor
• Series: HC08r

Specifications of MC908LJ12CFBE

• Core Processor: HC08
• Core Size: 8-Bit
• Speed: 8MHz
• Connectivity: IRSCI, SPI
• Peripherals: LCD, LVD, POR, PWM
• Number Of I /o: 20
• Program Memory Size: 12KB (12K x 8)
• Program Memory Type: FLASH
• Ram Size: 512 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 52-LQFP
• Processor Series: HC08LJ
• Core: HC08
• Data Bus Width: 8 bit
• Data Ram Size: 512 B
• Interface Type: SCI/SPI
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 4
• Operating Supply Voltage: 3.3 V, 5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 6-ch x 10-bit
• Controller Family/series: HC08
• No. Of I/o's: 20
• Ram Memory Size: 512Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Embedded Interface Type: SCI, SPI
• Rohs Compliant: Yes
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

Configuration Registers (CONFIG)
Technical Data
76
PCEH — Port C Enable High Nibble
PCEL — Port C Enable Low Nibble
LVISEL[1:0] — LVI Operating Mode Selection
Setting PCEH configures the PTC4/FP23–PTC7/FP26 pins for LCD
frontplane driver use. Reset clears this bit.
Setting PCEL configures the PTC0/FP19–PTC3/FP22 pins for LCD
frontplane driver use. Reset clears this bit.
LVISEL[1:0] selects the voltage operating mode of the LVI module.
(See
selected for the LVI should match the operating V
Electrical Specifications
the modes.
1 = PTC4/FP23–PTC7/FP26 pins configured as LCD frontplane
0 = PTC4/FP23–PTC7/FP26 pins configured as standard I/O pins:
1 = PTC0/FP19–PTC3/FP22 pins configured as LCD frontplane
0 = PTC0/FP19–PTC3/FP22 pins configured as standard I/O pins:
Section 21. Low-Voltage Inhibit
Configuration Registers (CONFIG)
driver pins: FP23–FP26
PTC4–PTC7
driver pins: FP19–FP22
PTC0–PTC3
LVISEL1
0
0
1
1
Table 5-1. LVI Trip Point Selection
LVISEL0
0
1
0
1
for the LVI voltage trip points for each of
Operating Mode
(LVI).) The voltage mode
Reserved (2.5V)
Reserved
MC68HC908LJ12
3V
5V
Freescale Semiconductor
DD
. See
Section 23.
—
Rev. 2.1