MC908LJ12CFBE Freescale Semiconductor, MC908LJ12CFBE Datasheet - Page 375
![IC MCU 12K FLASH 8MHZ 52-LQFP](/photos/12/35/123587/mc908lj12cfbe_sml.jpg)
MC908LJ12CFBE
Manufacturer Part Number
MC908LJ12CFBE
Description
IC MCU 12K FLASH 8MHZ 52-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68HC98LJ12CFUE.pdf
(414 pages)
Specifications of MC908LJ12CFBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
20
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-LQFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
20
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Part Number:
MC908LJ12CFBE
Manufacturer:
Freescale Semiconductor
Quantity:
135
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MC908LJ12CFBE
Manufacturer:
SANYO
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Part Number:
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20.5 COP Control Register
20.6 Interrupts
20.7 Monitor Mode
20.8 Low-Power Modes
MC68HC908LJ12
Freescale Semiconductor
—
Rev. 2.1
Address:
The COP control register is located at address $FFFF and overlaps the
reset vector. Writing any value to $FFFF clears the COP counter and
starts a new timeout period. Reading location $FFFF returns the low
byte of the reset vector.
The COP does not generate CPU interrupt requests.
When monitor mode is entered with V
disabled as long as V
monitor mode is entered by having blank reset vectors and not having
V
occurs.
The WAIT and STOP instructions put the MCU in low
power-consumption standby modes.
Reset:
Read:
Write:
TST
on the IRQ pin, the COP is automatically disabled until a POR
$FFFF
Computer Operating Properly (COP)
Bit 7
Figure 20-3. COP Control Register (COPCTL)
6
TST
remains on the IRQ pin or the RST pin. When
5
Low byte of reset vector
Unaffected by reset
Clear COP counter
4
TST
Computer Operating Properly (COP)
on the IRQ pin, the COP is
3
2
1
Technical Data
Bit 0
375
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