MC908LJ12CFBE Freescale Semiconductor, MC908LJ12CFBE Datasheet - Page 284
![IC MCU 12K FLASH 8MHZ 52-LQFP](/photos/12/35/123587/mc908lj12cfbe_sml.jpg)
MC908LJ12CFBE
Manufacturer Part Number
MC908LJ12CFBE
Description
IC MCU 12K FLASH 8MHZ 52-LQFP
Manufacturer
Freescale Semiconductor
Series
HC08r
Datasheet
1.MC68HC98LJ12CFUE.pdf
(414 pages)
Specifications of MC908LJ12CFBE
Core Processor
HC08
Core Size
8-Bit
Speed
8MHz
Connectivity
IRSCI, SPI
Peripherals
LCD, LVD, POR, PWM
Number Of I /o
20
Program Memory Size
12KB (12K x 8)
Program Memory Type
FLASH
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
52-LQFP
Processor Series
HC08LJ
Core
HC08
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SCI/SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
4
Operating Supply Voltage
3.3 V, 5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
FSICEBASE, M68EML08LJLKE, ZK-HC08LX-A, M68CBL05CE
Minimum Operating Temperature
- 40 C
On-chip Adc
6-ch x 10-bit
Controller Family/series
HC08
No. Of I/o's
20
Ram Memory Size
512Byte
Cpu Speed
8MHz
No. Of Timers
2
Embedded Interface Type
SCI, SPI
Rohs Compliant
Yes
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Available stocks
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Price
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Part Number:
MC908LJ12CFBE
Manufacturer:
Freescale Semiconductor
Quantity:
135
Company:
Part Number:
MC908LJ12CFBE
Manufacturer:
SANYO
Quantity:
650
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MC908LJ12CFBE
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Quantity:
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Part Number:
MC908LJ12CFBE
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FREESCALE
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Serial Peripheral Interface Module (SPI)
14.8.2 Mode Fault Error
Technical Data
284
Setting the SPMSTR bit selects master mode and configures the
SPSCK and MOSI pins as outputs and the MISO pin as an input.
Clearing SPMSTR selects slave mode and configures the SPSCK and
MOSI pins as inputs and the MISO pin as an output. The mode fault bit,
MODF, becomes set any time the state of the slave select pin, SS, is
inconsistent with the mode selected by SPMSTR.
To prevent SPI pin contention and damage to the MCU, a mode fault
error occurs if:
For the MODF flag to be set, the mode fault error enable bit (MODFEN)
must be set. Clearing the MODFEN bit does not clear the MODF flag but
does prevent MODF from being set again after MODF is cleared.
Figure 14-10. Clearing SPRF When OVRF Interrupt Is Not Enabled
SPI RECEIVE
COMPLETE
•
•
SPSCR
OVRF
READ
READ
SPDR
SPRF
The SS pin of a slave SPI goes high during a transmission
The SS pin of a master SPI goes low at any time
Serial Peripheral Interface Module (SPI)
1
2
3
4
5
6
7
BYTE 1
BYTE 2 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
BYTE 3 SETS OVRF BIT. BYTE 3 IS LOST.
BYTE 1 SETS SPRF BIT.
CPU READS SPSCR WITH SPRF BIT SET
AND OVRF BIT CLEAR.
CPU READS BYTE 1 IN SPDR,
CLEARING SPRF BIT.
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
1
2
3
4
BYTE 2
5
BYTE 3
6
7
8
10
11
12
13
14
8
9
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
CPU READS BYTE 2 SPDR,
CLEARING OVRF BIT.
BYTE 4 SETS SPRF BIT.
CPU READS SPSCR.
CPU READS BYTE 4 IN SPDR,
CLEARING SPRF BIT.
CPU READS SPSCR AGAIN
TO CHECK OVRF BIT.
CPU READS BYTE 2 IN SPDR,
CLEARING SPRF BIT.
MC68HC908LJ12
9
Freescale Semiconductor
BYTE 4
10
11
12
13
—
Rev. 2.1
14
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