MCF52110CVM80J Freescale Semiconductor, MCF52110CVM80J Datasheet - Page 37
![no-image](/images/manufacturer_photos/0/2/262/freescale_semiconductor_sml.jpg)
MCF52110CVM80J
Manufacturer Part Number
MCF52110CVM80J
Description
IC MCU 128K FLASH 80MHZ 81MAPBGA
Manufacturer
Freescale Semiconductor
Series
MCF521xxr
Datasheet
1.MCF52110CAF80.pdf
(56 pages)
Specifications of MCF52110CVM80J
Core Processor
Coldfire V2
Core Size
32-Bit
Speed
80MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
DMA, LVD, POR, PWM, WDT
Number Of I /o
56
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
81-MAPBGA
Processor Series
MCF521x
Core
ColdFire V2
3rd Party Development Tools
JLINK-CF-BDM26, EWCF
Development Tools By Supplier
M52210DEMO, M52211EVB
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
MCF52110CVM80J
Manufacturer:
Freescale Semiconductor
Quantity:
10 000
Electrical Characteristics
2.13
Figure 8
closed/open. When S1/S2 are closed & S3 is open, one input of the sample and hold circuit moves to (V
the other charges to the analog input voltage. When the switches are flipped, the charge on C1 and C2 are averaged via S3, with
the result that a single-ended analog input is switched to a differential voltage centered about (V
switch on every cycle of the ADC clock (open one-half ADC clock, closed one-half ADC clock). There are additional
capacitances associated with the analog input pad, routing, etc., but these do not filter into the S/H output voltage, as S1 provides
isolation during the charge-sharing phase. One aspect of this circuit is that there is an on-going input current, which is a function
of the analog input voltage, V
37
1
2
3
4
5
6
7
All measurements are preliminary pending full characterization, and made at V
INL measured from V
LSB = Least Significant Bit
INL measured from V
Includes power-up of ADC and V
ADC clock cycles
Current that can be injected or sourced from an unselected ADC signal input without impacting the performance of the ADC
SINAD
ENOB
Name
SFDR
THD
1.
2.
3.
4.
5.
shows the ADC input circuit during sample and hold. S1 and S2 are always open/closed at the same time that S3 is
Parasitic capacitance due to package, pin-to-pin and pin-to-package base coupling; 1.8pF
Parasitic capacitance due to the chip bond pad, ESD protection devices and signal routing; 2.04pF
Equivalent resistance for the channel select mux; 100 s
Sampling capacitor at the sample and hold circuit. Capacitor C1 is normally disconnected from the input and is only
connected to it at sampling time; 1.4pF
Equivalent input impedance, when the input is selected =
Analog Input
Equivalent Circuit for ADC Inputs
Total harmonic distortion
Spurious free dynamic range
Signal-to-noise plus distortion
Effective number of bits
1
IN
IN
= V
= 0.1V
REF
REFL
2
REFH
Characteristic
and the ADC clock frequency.
to V
REF
Figure 8. Equivalent Circuit for A/D Loading
to V
IN
Table 33. ADC Parameters
MCF52110 ColdFire Microcontroller, Rev. 1
= V
IN
REFH
= 0.9V
125W ESD Resistor
REFH
(V
REFH
3
- V
REFL
)/ 2
(ADC Clock Rate) (1.410
8pF noise damping capacitor
S1
1
(continued)
S2
Min
9.1
—
—
—
1
DD
4
= 3.3V, V
S3
67 to 70.3
61 to 63.9
Typical
10.6
75
C2
C1
-12
REFH
)
REFH
S/H
= 3.3V, and V
Freescale Semiconductor
-V
C1 = C2 = 1pF
Max
REFH
REFL
—
—
—
—
)/2. The switches
-V
REFL
REFL
)/2, while
Unit
= ground
Bits
dB
dB
dB