MC9S12P64CFT Freescale Semiconductor, MC9S12P64CFT Datasheet - Page 79

• Manufacturer Part Number: MC9S12P64CFT
• Description: MCU 16BIT 64K FLASH 48-QFN
• Manufacturer: Freescale Semiconductor
• Series: HCS12r

Specifications of MC9S12P64CFT

• Core Processor: HCS12
• Core Size: 16-Bit
• Speed: 32MHz
• Connectivity: CAN, SCI, SPI
• Peripherals: LVD, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 4K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.72 V ~ 5.5 V
• Data Converters: A/D 10x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 48-QFN Exposed Pad
• Processor Series: S12P
• Core: HCS12
• 3rd Party Development Tools: EWHCS12
• Development Tools By Supplier: KIT33812ECUEVME, DEMO9S12PFAME
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

1. Read: Anytime
1. Read: Anytime
2.3.27
2.3.28
Freescale Semiconductor
Address 0x024B
Address 0x024C
Write: Anytime
Write: Anytime
RDRS
PERS
Field
Field
Reset
Reset
3-0
3-0
W
W
R
R
Port S reduced drive—Select reduced drive for output pin
This bit configures the drive strength of the associated output pin as either full or reduced. If a pin is used as input
this bit has no effect. The reduced drive function is independent of which function is being used on a particular pin.
1 Reduced drive selected (approx. 1/5 of the full drive strength)
0 Full drive strength enabled
Port S pull device enable—Enable pull device on input pin or wired-or output pin
This bit controls whether a pull device on the associated port input pin is active. If a pin is used as output this bit has
only effect if used in wired-or mode. The polarity is selected by the related polarity select register bit.
1 Pull device enabled
0 Pull device disabled
Port S Reduced Drive Register (RDRS)
Port S Pull Device Enable Register (PERS)
0
0
0
0
7
7
Figure 2-26. Port S Pull Device Enable Register (PERS)
0
0
0
0
6
6
Figure 2-25. Port S Reduced Drive Register (RDRS)
Table 2-24. RDRS Register Field Descriptions
Table 2-25. PERS Register Field Descriptions
S12P-Family Reference Manual, Rev. 1.13
5
0
0
5
0
0
0
0
0
0
4
4
Description
Description
RDRS3
PERS3
0
1
3
3
RDRS2
PERS2
0
1
2
2
Port Integration Module (S12PPIMV1)
Access: User read/write
Access: User read/write
RDRS1
PERS1
0
1
1
1
RDRS0
PERS0
0
1
0
0
79
(1)
(1)