MC9S08QD2MSCR Freescale Semiconductor, MC9S08QD2MSCR Datasheet - Page 51
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MC9S08QD2MSCR
Manufacturer Part Number
MC9S08QD2MSCR
Description
IC MCU 8BIT 8-SOIC
Manufacturer
Freescale Semiconductor
Series
HCS08r
Specifications of MC9S08QD2MSCR
Core Processor
HCS08
Core Size
8-Bit
Speed
16MHz
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
4
Program Memory Size
2KB (2K x 8)
Program Memory Type
FLASH
Ram Size
128 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 4x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 125°C
Package / Case
8-SOIC (3.9mm Width)
Processor Series
S08QD
Core
HCS08
Data Bus Width
8 bit
Data Ram Size
128 B
3rd Party Development Tools
EWS08
Development Tools By Supplier
DEMO9S08QD4
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
Details
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Chapter 5
Resets, Interrupts, and General System Control
5.1
This chapter discusses basic reset and interrupt mechanisms and the various sources of reset and interrupts
in the MC9S08QD4 series. Some interrupt sources from peripheral modules are discussed in greater detail
within other sections of this data sheet. This section gathers basic information about all reset and interrupt
sources in one place for easy reference. A few reset and interrupt sources, including the computer
operating properly (COP) watchdog and real-time interrupt (RTI), are not part of on-chip peripheral
systems with their own chapters but are part of the system control logic.
5.2
Reset and interrupt features include:
5.3
Resetting the MCU provides a way to start processing from a known set of initial conditions. During reset,
most control and status registers are forced to initial values and the program counter is loaded from the
reset vector (0xFFFE:0xFFFF). On-chip peripheral modules are disabled and I/O pins are initially
configured as general-purpose high-impedance inputs with pullup devices disabled. The I bit in the
condition code register (CCR) is set to block maskable interrupts so the user program has a chance to
initialize the stack pointer (SP) and system control settings. SP is forced to 0x00FF at reset.
The MC9S08QD4 series has the following sources for reset:
Each of these sources, with the exception of the background debug forced reset, has an associated bit in
the system reset status register.
Freescale Semiconductor
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Multiple sources of reset for flexible system configuration and reliable operation
Reset status register (SRS) to indicate source of most recent reset
Separate interrupt vectors for each module (reduces polling overhead) (see
External pin reset (PIN) - enabled using RSTPE in SOPT1
Power-on reset (POR)
Low-voltage detect (LVD)
Computer operating properly (COP) timer
Illegal opcode detect (ILOP)
Illegal address detect (ILAD)
Background debug forced reset
Introduction
Features
MCU Reset
MC9S08QD4 Series MCU Data Sheet, Rev. 6
Table
5-2)
51
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