ST10F273M-4TR3 STMicroelectronics, ST10F273M-4TR3 Datasheet - Page 38

• Manufacturer Part Number: ST10F273M-4TR3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Internal Flash memory
5.4.10
5.4.11
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Flash address register high (FARH)
FARH (0x0E 0012)
Table 17.
Flash error register (FER)
The Flash error register, as well as all the other Flash registers, can be read only once the
LOCK bit of register FCR0L is low. Nevertheless, the FER content is updated after
completion of the Flash operation, that is, when BSYx bits are reset. Therefore, the FER
content can only be read once the LOCK and BSYx bits are cleared.
FER (0xE 0014h)
Table 18.
15:5
15:9
15
15
Bit
4:0
Bit
5:4
8
7
6
14
14
RESER
SEQER
ADD20
Name
Name
ADD6
WPF
...
FARH register description
-
FER register bits
-
-
13
13
Reserved
12
12
-
Address 20:16
Reserved. These bits must be kept to their default value (0).
Reserved. These bits must be kept to their default value (0).
Write protection flag
Resume error
Sequence error
Reserved. These bits must be kept to their default value (0).
These bits must be written with the Address of the Flash location to program
during the following operations: Word Program and Double Word Program.
This bit is automatically set when trying to program or erase in a sector write
protected. In case of multiple Sector Erase, the not protected sectors are
erased, while the protected sectors are not erased and bit WPF is set. This
bit must be cleared by software.
This bit is automatically set when a suspended Program or Erase operation is
not resumed correctly due to a protocol error. In this case the suspended
operation is aborted. This bit must be cleared by software.
This bit is automatically set when the control registers (FCR1H/L-FCR0H/L,
FARH/L, FDR1H/L-FDR0H/L) are not correctly filled to execute a valid Write
Operation. In this case no Write Operation is executed. This bit must be
cleared by software.
11
11
Reserved
10
10
-
9
9
WPF RESER SEQER
RC
8
8
FCR
FCR
RC
7
7
Function
Function
RC
6
6
5
5
Reserved
-
ADD
RW
20
4
4
ADD
10ER PGER ERER
RW
RC
19
3
3
Reset value: 0000h
Reset value: 0000h
ADD
RW
RC
18
2
2
ST10F273M
ADD
RW
RC
17
1
1
ADD
RW
ERR
RC
16
0
0