ST10F273M-4TR3 STMicroelectronics, ST10F273M-4TR3 Datasheet - Page 174

• Manufacturer Part Number: ST10F273M-4TR3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

Electrical characteristics
24.8.20
Table 75.
1. When 40 MHz CPU clock is used the maximum baudrate cannot be higher than 6.6Mbaud (<SSCBR> = ‘2h’) due to the
2. Formula for SSC Clock Cycle time: t
3. Partially tested, guaranteed by design characterization
174/182
t
t
t
t
t
t
t
t
t
t
t
Symbol
300
301
302
303
304
305
306
307p
308p
307
308
limited granularity of <SSCBR>. Value ‘1h’ for <SSCBR> can be used only with CPU clock equal to (or lower than) 32 MHz.
Baudrate register, taken as unsigned 16-bit integer. Minimum limit allowed for t
CC SSC clock cycle time
CC SSC clock high time
CC SSC clock low time
CC SSC clock rise time
CC SSC clock fall time
CC Write data valid after shift edge
CC Write data hold after shift edge
SR
SR
SR
SR
Read data setup time before latch
edge, phase error detection on
(SSCPEN = 1)
Read data hold time after latch
edge, phase error detection on
(SSCPEN = 1)
Read data setup time before latch
edge, phase error detection off
(SSCPEN = 0)
Read data hold time after latch
edge, phase error detection off
(SSCPEN = 0)
High-speed synchronous serial interface (SSC) timing
Master mode
V
SSC master mode timings
DD
= 5V ±10%, V
Parameter
(2)
SS
300
= 0V, T
= 4 TCL x (<SSCBR> + 1) Where <SSCBR> represents the content of the SSC
(3)
A
Max. baudrate 6.6Mbaud
= -40 to +125°C, C
(<SSCBR> = 0002h)
37.5
Min
150
63
63
50
25
-2
@f
–
–
–
0
CPU
= 40 MHz
Max
150
10
10
15
L
–
–
–
–
–
–
–
= 50pF
300
(1)
is 125ns (corresponding to 6.6Mbaud)
(<SSCBR> = 0001h - FFFFh)
2TCL + 12.5
t
t
300
300
8TCL
4TCL
2TCL
Min
/ 2 - 12
/ 2 - 12
Variable baudrate
-2
–
–
–
0
262144 TCL
Max
10
10
15
–
–
–
–
–
–
–
ST10F273M
Unit
ns