ST10F273M-4TR3 STMicroelectronics, ST10F273M-4TR3 Datasheet - Page 157

• Manufacturer Part Number: ST10F273M-4TR3
• Description: MCU 16BIT 512K FLASH 144-LQFP
• Manufacturer: STMicroelectronics
• Series: ST10r

Specifications of ST10F273M-4TR3

• Core Processor: ST10
• Core Size: 16-Bit
• Speed: 40MHz
• Connectivity: ASC, CAN, EBI/EMI, I²C, SSC, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 111
• Program Memory Size: 512KB (512K x 8)
• Program Memory Type: FLASH
• Ram Size: 36K x 8
• Voltage - Supply (vcc/vdd): 4.5 V ~ 5.5 V
• Data Converters: A/D 24x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 125°C
• Package / Case: 144-MQFP, 144-PQFP
• Processor Series: ST10F27x
• Core: ST10
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

ST10F273M
24.8.14
24.8.15
Note:
24.8.16
Table 71.
Symbol
t
t
t
t
t
t
t
t
t
t
5
6
7
8
9
10
11
12
13
14
CC ALE high time
CC Address setup to ALE
CC Address hold after ALE
CC
CC
CC
CC
CC
CC
SR
ALE falling edge to RD, WR
(with RW-delay)
ALE falling edge to RD, WR (no
RW-delay)
Address float after RD, WR
(with RW-delay)
Address float after RD, WR (no
RW-delay)1
RD, WR low time
(with RW-delay)
RD, WR low time
(no RW-delay)
RD to valid data in
(with RW-delay)
Memory cycle variables
The tables below use three variables which are derived from the BUSCONx registers and
represent the special characteristics of the programmed memory cycle. The following table
describes how these variables are to be computed.
Table 70.
External memory bus timing
The following sections present the External Memory Bus timings. The given values are
computed for a maximum CPU clock of 40 MHz.
All external memory bus timings and SSC timings reported in the following tables are based
on design characterization and not fully tested in production.
Multiplexed bus
V
ALE cycle time = 6 TCL + 2t
Multiplexed bus timings
ALE Extension
Memory Cycle Time wait states
Memory Tri-stateTime
DD
= 5V ± 10%, V
Parameter
Description
Memory cycle variables
SS
= 0V, T
15.5 + t
-8.5 + t
1.5 + t
28 + t
A
4 + t
4 + t
4 + t
Min
A
+ t
–
–
–
= -40 to +125°C, CL = 50pF,
f
TCL = 12.5ns
CPU
A
A
A
C
C
A
A
C
+ t
= 40 MHz
F
Symbol
(75ns at 40 MHz CPU clock without wait states)
6 + t
t
t
Max
18.5
t
A
C
F
–
–
–
–
–
6
–
–
C
TCL x [ALECTL]
2TCL x (15 - [MCTC])
2TCL x (1 - [MTTC])
2TCL - 9.5 + t
3TCL - 9.5 + t
TCL - 8.5 + t
TCL - 8.5 + t
TCL - 8.5 + t
TCL - 11 + t
-8.5 + t
Min
1/2 TCL = 1 to 40 MHz
–
–
–
Variable CPU clock
A
A
A
A
A
C
C
Electrical characteristics
Values
2TCL - 19 + t
TCL + 6
Max
–
–
–
–
–
6
–
–
C
157/182
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns