Z8F0813HJ005EG Zilog, Z8F0813HJ005EG Datasheet - Page 93

IC Z8 ENCORE MCU FLASH 8K 28SSOP

Z8F0813HJ005EG

Manufacturer Part Number
Z8F0813HJ005EG
Description
IC Z8 ENCORE MCU FLASH 8K 28SSOP
Manufacturer
Zilog
Series
Encore!® XP®r
Datasheet

Specifications of Z8F0813HJ005EG

Core Processor
Z8
Core Size
8-Bit
Speed
5MHz
Connectivity
IrDA, UART/USART
Peripherals
Brown-out Detect/Reset, LED, POR, PWM, WDT
Number Of I /o
24
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.6 V
Oscillator Type
Internal
Operating Temperature
-40°C ~ 105°C
Package / Case
28-SSOP
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Other names
269-4182
Z8F0813HJ005EG
BITS
FIELD
RESET
R/W
ADDR
BITS
FIELD
RESET
R/W
ADDR
PS025203-0405
Timer 0–1 Control Registers
TMODEHI
R/W
R/W
0
0
7
7
PWMH and PWML—Pulse-Width Modulator High and Low Bytes
These two bytes, {PWMH[7:0], PWML[7:0]}, form a 16-bit value that is compared to the
current 16-bit timer count. When a match occurs, the PWM output changes state. The
PWM output value is set by the TPOL bit in the Timer Control Register (TxCTL1) regis-
ter.
The TxPWMH and TxPWML registers also store the 16-bit captured timer value when
operating in Capture or Capture/Compare modes.
Time 0–1 Control Register 0
The Timer Control Register 0 (TxCTL0) and Timer Control Register 1 (TxCTL1) deter-
mine the timer operating mode. It also includes a programmable PWM deadband delay,
two bits to configure timer interrupt definition, and a status bit to identify if the most
recent timer interrupt is caused by an input capture event.
TMODEHI—Timer Mode High Bit
This bit along with the TMODE field in TxCTL1 register determines the operating mode
of the timer. This is the most significant bit of the Timer mode selection value. See the
TxCTL1 register description on the next page for additional details.
TICONFIG—Timer Interrupt Configuration
This field configures timer interrupt definition.
Table 54. Timer 0–1 PWM Low Byte Register (TxPWML)
R/W
R/W
Table 55. Timer 0–1 Control Register 0 (TxCTL0)
6
0
6
0
TICONFIG
R/W
R/W
5
0
5
0
P R E L I M I N A R Y
Reserved
R/W
R/W
0
0
4
4
F05H, F0DH
F06H, F0EH
PWML
R/W
R/W
3
0
3
0
Z8 Encore!
PWMD
R/W
R/W
0
0
2
2
Product Specification
®
R/W
R/W
1
0
1
0
Z8F0823 Series
INPCAP
R/W
R/W
0
0
0
0
Timers
76

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