Z8F0813HJ005EG Zilog, Z8F0813HJ005EG Datasheet - Page 101

• Manufacturer Part Number: Z8F0813HJ005EG
• Description: IC Z8 ENCORE MCU FLASH 8K 28SSOP
• Manufacturer: Zilog
• Series: Encore!® XP®r

Specifications of Z8F0813HJ005EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 5MHz
• Connectivity: IrDA, UART/USART
• Peripherals: Brown-out Detect/Reset, LED, POR, PWM, WDT
• Number Of I /o: 24
• Program Memory Size: 8KB (8K x 8)
• Program Memory Type: FLASH
• Ram Size: 1K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 28-SSOP
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Other names: 269-4182; Z8F0813HJ005EG

Watch-Dog Timer Control Register Definitions
BITS
FIELD
RESET
R/W
ADDR
PS025203-0405
Watch-Dog Timer Control Register
Watch-Dog Timer Reload Upper, High and Low Byte Registers
W
X
7
All three Watch-Dog Timer Reload registers must be written in the order just listed. There
must be no other register writes between each of these operations. If a register write
occurs, the lock state machine resets and no further writes can occur unless the sequence is
restarted. The value in the Watch-Dog Timer Reload registers is loaded into the counter
when the Watch-Dog Timer is first enabled and every time a WDT instruction is executed.
The Watch-Dog Timer Control (WDTCTL) register is a write-only control register. Writ-
ing the
Watch-Dog Timer Reload Byte registers (WDTU, WDTH, and WDTL) to allow changes
to the time-out period. These write operations to the WDTCTL register address produce
no effect on the bits in the WDTCTL register. The locking mechanism prevents spurious
writes to the Reload registers.
This register address is shared with the read-only Reset Status Register.
WDTUNLK—Watch-Dog Timer Unlock
The user software must write the correct unlocking sequence to this register before it is
allowed to modify the contents of the watch-dog timer reload registers.
The Watch-Dog Timer Reload Upper, High and Low Byte (WDTU, WDTH, WDTL) reg-
isters (Tables 59 through 61) form the 24-bit reload value that is loaded into the Watch-
Dog Timer when a WDT instruction executes. The 24-bit reload value is {WDTU[7:0],
WDTH[7:0], WDTL[7:0]}. Writing to these registers sets the appropriate Reload Value.
Reading from these registers returns the current Watch-Dog Timer count value.
Table 58. Watch-Dog Timer Control Register (WDTCTL)
55H
W
X
6
,
AAH
unlock sequence to the WDTCTL register address unlocks the three
W
X
5
P R E L I M I N A R Y
W
X
4
WDTUNLK
FF0H
W
X
3
Z8 Encore!
W
X
2
Product Specification
®
W
X
1
Z8F0823 Series
Watch-Dog Timer
W
X
0
84