LPC2888FET180/D1,5 NXP Semiconductors, LPC2888FET180/D1,5 Datasheet - Page 6

• Manufacturer Part Number: LPC2888FET180/D1,5
• Description: IC ARM7 MCU 16K 180-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2800r

Specifications of LPC2888FET180/D1,5

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, UART/USART, USB
• Peripherals: DMA, I²S, LCD, WDT
• Number Of I /o: 85
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC28
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 81
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM10092
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• For Use With: OM10092 - EVAL BOARD FOR LPC288X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 935285219551; LPC2888FET180/D1-S; LPC2888FET180/D1-S

NXP Semiconductors
Table 4.
LPC2880_LPC2888_3
Preliminary data sheet
Symbol
Analog in (dual converter)
AINL
AINR
VCOM(DADC)
VREF(DADC)
VREFN(DADC)
VREFP(DADC)
V
V
V
DD(DADC1V8)
DD(DADC3V3)
SS(DADC)
Pin description
5.2 Pin description
Ball #
T4
T1
T3
U1
V1
U2
V3
U3
V2
Table 3.
[1]
Pin
17
Row R
1
13
17
Row T
1
5
9
13
17
Row U
1
5
9
13
17
Row V
1
5
9
13
17
These pins are connected internally and must be left unconnected in an application.
Type
I
I
RV
RV
RV
RV
P
P
P
Symbol
DCDC_LX1
V
-
V
AINR
JTAG_TDI
V
JTAG_TRST
DM
VREF(DADC)
AIN4
V
JTAG_TDO
DP
VREFN(DADC)
V
XTALO
V
V
DD5(IO3V3)
SS1(USB)
SS(OSC)
DD(OSC1V8)
DD2(IO3V3)
SS3(IO)
SS3(CORE)
[1]
Pin allocation table
Description
analog L input channel
analog R input channel
ADC common reference voltage and analog output reference voltage
combined on-chip
ADC reference voltage
ADC negative reference voltage
ADC positive reference voltage
1.8 V for dual ADC
3.3 V for dual ADC
ground for dual ADC
16/32-bit ARM microcontrollers with external memory interface
Pin
18
2
14
18
2
6
10
14
18
2
6
10
14
18
2
6
10
14
18
Rev. 03 — 17 April 2008
Symbol
DCDC_V
V
-
DCDC_V
i.c.
AIN3
XTALI
RESET
DCDC_V
VREFP(DADC)
AIN2
V
VBUS/P7[0]
V
V
V
V
V
V
DD6(IO3V3)
SS(ADC)
DD3(USB3V3)
SS(DADC)
SS2(IO)
DD(ADC3V3)
DD3(IO3V3)
DD4(USB3V3)
…continued
[1]
SS1
DDO(3V3)
USB
Pin
3
15
3
7
11
15
3
7
11
15
3
7
11
15
LPC2880; LPC2888
Symbol
-
i.c.
-
-
V
AIN1
V
CONNECT
-
V
AIN0
V
V
-
V
X32I
V
V
-
COM(DADC)
SS3(INT)
DD(DADC3V3)
SS2(INT)
DD1(USB1V8)
DD(DADC1V8)
DD2(CORE1V8)
DD1(FLASH1V8)
[1]
Pin
4
16
4
8
12
16
4
8
12
16
4
8
12
16
© NXP B.V. 2008. All rights reserved.
Symbol
-
-
V
-
AINL
X32O
V
V
-
JTAG_SEL
V
JTAG_TMS
V
-
JTAG_TCK
V
V
V
-
SS2(USB)
SS1(INT)
SS3(USB)
DD(OSC321V8)
DD2(USB1V8)
SS(OSC32)
SS2(CORE)
DD2(FLASH1V8)
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