LPC2888FET180/D1,5 NXP Semiconductors, LPC2888FET180/D1,5 Datasheet - Page 12

• Manufacturer Part Number: LPC2888FET180/D1,5
• Description: IC ARM7 MCU 16K 180-TFBGA
• Manufacturer: NXP Semiconductors
• Series: LPC2800r

Specifications of LPC2888FET180/D1,5

• Core Processor: ARM7
• Core Size: 16/32-Bit
• Speed: 60MHz
• Connectivity: EBI/EMI, I²C, IrDA, MMC, UART/USART, USB
• Peripherals: DMA, I²S, LCD, WDT
• Number Of I /o: 85
• Program Memory Size: 1MB (1M x 8)
• Program Memory Type: FLASH
• Ram Size: 64K x 8
• Voltage - Supply (vcc/vdd): 1.7 V ~ 3.6 V
• Data Converters: A/D 5x10b
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 180-TFBGA
• Processor Series: LPC28
• Core: ARM7TDMI-S
• Data Bus Width: 32 bit
• Data Ram Size: 64 KB
• Interface Type: I2C, I2S, UART, USB
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 81
• Number Of Timers: 2
• Operating Supply Voltage: 1.8 V, 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2
• Development Tools By Supplier: OM10092
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 5 Channel
• For Use With: OM10092 - EVAL BOARD FOR LPC288X
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details
• Other names: 935285219551; LPC2888FET180/D1-S; LPC2888FET180/D1-S

NXP Semiconductors
LPC2880_LPC2888_3
Preliminary data sheet
6.1.1 ARM7TDMI processor
6.1.2 On-chip flash memory system
6.1.3 On-chip SRAM
6.1.4 On-chip ROM
Lower speed peripheral functions are connected to the APBs. The four AHB-to-APB
bridges interface the APBs to the AHB.
The ARM7TDMI is a general purpose 32-bit microprocessor that offers high performance
and very low power consumption. The ARM architecture is based on RISC principles, and
the instruction set and related decode mechanism are much simpler than those of
microprogrammed CISCs. This simplicity results in a high instruction throughput and
impressive real-time interrupt response from a small and cost-effective processor core.
Pipeline techniques are employed so that all parts of the processing and memory systems
can operate continuously. Typically, while one instruction is being executed, its successor
is being decoded, and a third instruction is being fetched from memory.
The ARM7TDMI processor also employs a unique architectural strategy known as Thumb,
which makes it ideally suited to high-volume applications with memory restrictions, or
applications where code density is an issue.
The key idea behind Thumb is that of a super-reduced instruction set. Essentially, the
ARM7TDMI processor has two instruction sets:
The Thumb set’s 16-bit instruction length allows it to approach twice the density of
standard ARM code while retaining most of the ARM’s performance advantage over a
traditional 16-bit processor using 16-bit registers. This is possible because Thumb code
operates on the same 32-bit register set as ARM code.
Thumb code is able to provide down to 65 % of the code size of ARM, and 160 % of the
performance of an equivalent ARM processor connected to a 16-bit memory system.
The ARM7TDMI processor is described in detail on the ARM web site.
The LPC2880/2888 includes a 1 MB flash memory system. This memory may be used for
both code and data storage. Programming of the flash memory may be accomplished in
several ways. It may be programmed In System via the USB port. The application program
may also erase and/or program the flash while the application is running, allowing a great
degree of flexibility for data storage field firmware upgrades, etc.
The flash is 128 bit wide and includes buffering to allow 3 out of 4 sequential read
operations to operate without wait states.
The LPC2880/2888 includes 64 kB of SRAM that may be used for code and/or data
storage.
The LPC2880/2888 includes an on-chip ROM that contains boot code. Execution begins
in on-chip ROM after a reset.
•
•
The standard 32-bit ARM instruction set.
A 16-bit Thumb instruction set.
16/32-bit ARM microcontrollers with external memory interface
Rev. 03 — 17 April 2008
LPC2880; LPC2888
© NXP B.V. 2008. All rights reserved.
12 of 43