ATMEGA2561V-8AU Atmel, ATMEGA2561V-8AU Datasheet - Page 360
![IC AVR MCU 256K 8MHZ 64TQFP](/photos/12/13/121332/313-64-tqfp_sml.jpg)
ATMEGA2561V-8AU
Manufacturer Part Number
ATMEGA2561V-8AU
Description
IC AVR MCU 256K 8MHZ 64TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA2561V-8AU
Core Processor
AVR
Core Size
8-Bit
Speed
8MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ATMEGA256x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
8 KB
Interface Type
2-Wire/SPI/USART
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
54
Number Of Timers
6
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
On-chip Adc
8-ch x 10-bit
For Use With
ATSTK600-TQFP64 - STK600 SOCKET/ADAPTER 64-TQFP770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1005 - ISP 4PORT FOR ATMEL AVR MCU JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPIATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA2561V-8AU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 360 of 444
- Download datasheet (10Mb)
Table 29-18. JTAG Programming Instruction (Continued)
2549M–AVR–09/10
Instruction
4g. Poll for Page Write Complete
5a. Enter EEPROM Read
5b. Load Address High Byte
5c. Load Address Low Byte
5d. Read Data Byte
6a. Enter Fuse Write
6b. Load Data Low Byte
6c. Write Fuse Extended Byte
6d. Poll for Fuse Write Complete
6e. Load Data Low Byte
6f. Write Fuse High Byte
6g. Poll for Fuse Write Complete
6h. Load Data Low Byte
6i. Write Fuse Low Byte
6j. Poll for Fuse Write Complete
7a. Enter Lock Bit Write
7b. Load Data Byte
7c. Write Lock Bits
7d. Poll for Lock Bit Write complete
8a. Enter Fuse/Lock Bit Read
8b. Read Extended Fuse Byte
8c. Read Fuse High Byte
Set (Continued)
o = data out, i = data in, x = don’t care
(9)
(6)
(7)
(7)
(7)
(6)
a = address high bits, b = address low bits, c = address extended bits, H = 0 - Low byte, 1 - High Byte,
TDI Sequence
0110011_00000000
0100011_00000011
0000111_aaaaaaaa
0000011_bbbbbbbb
0110011_bbbbbbbb
0110010_00000000
0110011_00000000
0100011_01000000
0010011_iiiiiiii
0111011_00000000
0111001_00000000
0111011_00000000
0111011_00000000
0110111_00000000
0010011_iiiiiiii
0110111_00000000
0110101_00000000
0110111_00000000
0110111_00000000
0110111_00000000
0010011_iiiiiiii
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0110011_00000000
0010011_11iiiiii
0110011_00000000
0110001_00000000
0110011_00000000
0110011_00000000
0110011_00000000
0100011_00000100
0111010_00000000
0111011_00000000
0111110_00000000
0111111_00000000
0100011_00100000
ATmega640/1280/1281/2560/2561
TDO Sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxox_xxxxxxxx
xxxxxxx_xxxxxxxx
Notes
(2)
(10)
(3)
(1)
(2)
(3)
(1)
(2)
(3)
(1)
(2)
(4)
(1)
(2)
360
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