ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 26
![MCU AVR 256KB FLASH A3B 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATXMEGA256A3B-MH
Manufacturer Part Number
ATXMEGA256A3B-MH
Description
MCU AVR 256KB FLASH A3B 64-QFN
Manufacturer
Atmel
Series
AVR® XMEGAr
Specifications of ATXMEGA256A3B-MH
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATXMEGA256x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
49
Number Of Timers
7
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATXMEGA256A3B-MU
ATXMEGA256A3B-MU
ATXMEGA256A3B-MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA256A3B-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
- Current page: 26 of 445
- Download datasheet (6Mb)
4.15.4
4.15.5
4.15.6
4.15.7
8077H–AVR–12/09
DATA2 - Non-Volatile Memory Data Register Byte 2
DATA1 - Non-Volatile Memory Data Register 1
DATA0 - Non-Volatile Memory Data Register 0
CMD - Non-Volatile Memory Command Register
The DATA2, DATA1 and ADDR0 registers represents the 24-bit value DATA.
• Bit 7:0 - DATA[23:16]: NVM Data Register 2
This register gives the data value byte 2 when running CRC check on application section, boot
section or combined.
• Bit 7:0 - DATA[15:8]: NVM Data Register Byte 1
This register gives the data value byte 1 when accessing application and boot section.
• Bit 7:0 - DATA[7:0]: NVM Data Register Byte 0
This register gives the data value byte 0 when accessing either of the memory locations.
• Bit 7 - Reserved
This bit is unused and reserved for future use. For compatibility with future devices, always write
this bit to zero when this register is written.
• Bit 6:0 -CMD[6:0]: NVM Command
These bits define the programming commands for the flash. Bit six is set for external program-
ming commands. See "Memory Programming data sheet" for programming commands.
Bit
+0x06
Read/Write
Initial Value
Bit
+0x05
Read/Write
Initial Value
Bit
+0x04
Read/Write
Initial Value
Bit
+0x0A
Read/Write
Initial Value
R/W
R/W
R/W
R
7
0
7
0
7
0
7
0
-
R/W
R/W
R/W
R
6
0
6
0
6
0
6
0
R/W
R/W
R/W
R/W
5
0
5
0
5
0
5
0
R/W
R/W
R/W
R/W
4
0
4
0
4
0
4
0
DATA[23:16]
DATA[15:8]
DATA[7:0]
CMD[6:0]
R/W
R/W
R/W
R/W
3
0
3
0
3
0
3
0
R/W
R/W
R/W
R/W
2
0
2
0
2
0
2
0
R/W
R/W
R/W
R/W
1
0
1
0
1
0
1
0
XMEGA A
R/W
R/W
R/W
R/W
0
0
0
0
0
0
0
0
DATA2
DATA1
DATA0
CMD
26
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