ATXMEGA256A3B-MH Atmel, ATXMEGA256A3B-MH Datasheet - Page 146
![MCU AVR 256KB FLASH A3B 64-QFN](/photos/12/13/121326/313-64-qfn_sml.jpg)
ATXMEGA256A3B-MH
Manufacturer Part Number
ATXMEGA256A3B-MH
Description
MCU AVR 256KB FLASH A3B 64-QFN
Manufacturer
Atmel
Series
AVR® XMEGAr
Specifications of ATXMEGA256A3B-MH
Core Processor
AVR
Core Size
8/16-Bit
Speed
32MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, POR, PWM, WDT
Number Of I /o
49
Program Memory Size
256KB (128K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
1.6 V ~ 3.6 V
Data Converters
A/D 16x12b; D/A 2x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-MLF®, 64-QFN
Processor Series
ATXMEGA256x
Core
AVR8
Data Bus Width
8 bit, 16 bit
Data Ram Size
16 KB
Interface Type
I2C, SPI, USART
Maximum Clock Frequency
32 MHz
Number Of Programmable I/os
49
Number Of Timers
7
Operating Supply Voltage
1.6 V to 3.6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 8 Channel
On-chip Dac
12 bit, 2 Channel
For Use With
ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATXMEGA256A3B-MU
ATXMEGA256A3B-MU
ATXMEGA256A3B-MU
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATXMEGA256A3B-MH
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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- Download datasheet (6Mb)
13.16 Register Description – Virtual Port
13.16.1
13.16.2
13.16.3
8077H–AVR–12/09
DIR - Data Direction
OUT - Data Output Value
IN - Data Input Value
Table 13-8.
• Bit 7:0 - DIR[7:0]: Data Direction Register
This register sets the data direction for the individual pins in the port mapped by "VPCTRLA -
Virtual Port-map Control Register A" or "VPCTRLB - Virtual Port-map Control Register B". When
a port is mapped as virtual, accessing this register is identical to accessing the actual DIR regis-
ter for the port.
• Bit 7:0 - OUT[7:0]: Data Output value
This register sets the data output value for the individual pins in the port mapped by "VPCTRLA
- Virtual Port-map Control Register A" or "VPCTRLB - Virtual Port-map Control Register B".
When a port is mapped as virtual, accessing this register is identical to accessing the actual
OUT register for the port.
Bit
+0x02
Read/Write
Initial Value
Bit
+0x01
Read/Write
Initial Value
CLKOUT[1:0]
00
01
10
11
Bit
+0x00
Read/Write
Initial Value
R/W
R/W
R/W
7
0
7
0
7
0
Clock output configurations
R/W
R/W
R/W
6
0
6
0
6
0
Group Configuration
OFF
PC7
PD7
PE7
R/W
R/W
R/W
5
0
5
0
5
0
R/W
R/W
R/W
4
0
4
0
4
0
OUT[7:0]
DIR[7:0]
IN[7:0]
Description
Clock out disabled
Clock output on Port C pin 7
Clock output on Port D pin 7
Clock output on Port E pin 7
R/W
R/W
R/W
3
0
3
0
3
0
R/W
R/W
R/W
2
0
2
0
2
0
R/W
R/W
R/W
1
0
1
0
1
0
XMEGA A
R/W
R/W
R/W
0
0
0
0
0
0
OUT
DIR
IN
146
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