ATMEGA644P-A15MZ Atmel, ATMEGA644P-A15MZ Datasheet - Page 18
![MCU AVR 64KB FLASH 16MHZ 44QFN](/photos/12/13/121316/313-44-qfn_sml.jpg)
ATMEGA644P-A15MZ
Manufacturer Part Number
ATMEGA644P-A15MZ
Description
MCU AVR 64KB FLASH 16MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644P-A15MZ
Package / Case
44-VQFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
32
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
I²C, SPI, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ATMEGA644P-A15MZ
Manufacturer:
ATMEL
Quantity:
3 500
Part Number:
ATMEGA644P-A15MZ
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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6. AVR Memories
6.1
6.2
18
Overview
In-System Reprogrammable Flash Program Memory
ATmega164P/324P/644P
This section describes the different memories in the ATmega164P/324P/644P. The AVR archi-
tecture has two main memory spaces, the Data Memory and the Program Memory space. In
addition, the ATmega164P/324P/644P features an EEPROM Memory for data storage. All three
memory spaces are linear and regular.
The ATmega164P/324P/644P contains 16/32/64K bytes On-chip In-System Reprogrammable
Flash memory for program storage. Since all AVR instructions are 16 or 32 bits wide, the Flash
is organized as 32/64 x 16. For software security, the Flash Program memory space is divided
into two sections, Boot Program section and Application Program section.
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega164P/324P/644P Program Counter (PC) is 15/16 bits wide, thus addressing the 32/64K
program memory locations. The operation of Boot Program section and associated Boot Lock
bits for software protection are described in detail in
“Memory Programming” on page 296
loading using the SPI pins or the JTAG interface.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description.
Timing diagrams for instruction fetch and execution are presented in
ing” on page
14.
contains a detailed description on Flash data serial down-
“Memory Programming” on page
“Instruction Execution Tim-
7674F–AVR–09/09
296.
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