ATMEGA644P-A15MZ Atmel, ATMEGA644P-A15MZ Datasheet - Page 138

MCU AVR 64KB FLASH 16MHZ 44QFN

ATMEGA644P-A15MZ

Manufacturer Part Number
ATMEGA644P-A15MZ
Description
MCU AVR 64KB FLASH 16MHZ 44QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA644P-A15MZ

Package / Case
44-VQFN Exposed Pad
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Operating Temperature
-40°C ~ 125°C
Speed
16MHz
Number Of I /o
32
Eeprom Size
2K x 8
Core Processor
AVR
Program Memory Type
FLASH
Ram Size
4K x 8
Program Memory Size
64KB (64K x 8)
Data Converters
A/D 8x10b
Oscillator Type
Internal
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Connectivity
I²C, SPI, UART/USART
Core Size
8-Bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

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14.11.9
138
ATmega164P/324P/644P
TIFR1 – Timer/Counter1 Interrupt Flag Register
• Bit 7:6 – Res: Reserved Bits
These bits are unused bits in the ATmega164P/324P/644P, and will always read as zero.
• Bit 5 – ICF1: Timer/Counter1, Input Capture Flag
This flag is set when a capture event occurs on the ICP1 pin. When the Input Capture Register
(ICR1) is set by the WGMn3:0 to be used as the TOP value, the ICF1 Flag is set when the coun-
ter reaches the TOP value.
ICF1 is automatically cleared when the Input Capture Interrupt Vector is executed. Alternatively,
ICF1 can be cleared by writing a logic one to its bit location.
• Bit 4:3 – Res: Reserved Bits
These bits are unused bits in the ATmega164P/324P/644P, and will always read as zero.
• Bit 2 – OCF1B: Timer/Counter1, Output Compare B Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output
Compare Register B (OCR1B).
Note that a Forced Output Compare (FOC1B) strobe will not set the OCF1B Flag.
OCF1B is automatically cleared when the Output Compare Match B Interrupt Vector is exe-
cuted. Alternatively, OCF1B can be cleared by writing a logic one to its bit location.
• Bit 1 – OCF1A: Timer/Counter1, Output Compare A Match Flag
This flag is set in the timer clock cycle after the counter (TCNT1) value matches the Output
Compare Register A (OCR1A).
Note that a Forced Output Compare (FOC1A) strobe will not set the OCF1A Flag.
OCF1A is automatically cleared when the Output Compare Match A Interrupt Vector is exe-
cuted. Alternatively, OCF1A can be cleared by writing a logic one to its bit location.
• Bit 0 – TOV1: Timer/Counter1, Overflow Flag
The setting of this flag is dependent of the WGMn3:0 bits setting. In Normal and CTC modes,
the TOV1 Flag is set when the timer overflows. Refer to
Flag behavior when using another WGMn3:0 bit setting.
TOV1 is automatically cleared when the Timer/Counter1 Overflow Interrupt Vector is executed.
Alternatively, TOV1 can be cleared by writing a logic one to its bit location.
Bit
0x16 (0x36)
Read/Write
Initial Value
R
7
0
R
6
0
ICF1
R/W
5
0
R
4
0
R
3
0
Table 14-5 on page 134
OCF1B
R/W
2
0
OCF1A
R/W
1
0
TOV1
R/W
0
0
7674F–AVR–09/09
for the TOV1
TIFR1

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