ATMEGA1280-16AUR Atmel, ATMEGA1280-16AUR Datasheet - Page 361

MCU AVR 128K FLASH 16MHZ 100TQFP

ATMEGA1280-16AUR

Manufacturer Part Number
ATMEGA1280-16AUR
Description
MCU AVR 128K FLASH 16MHZ 100TQFP
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA1280-16AUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
86
Program Memory Size
128KB (64K x 16)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TQFP, 100-VQFP
For Use With
ATSTK600-TQFP100 - STK600 SOCKET/ADAPTER 100-TQFPATSTK503 - STARTER KIT AVR EXP MODULE 100P
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA1280-16AUR
Manufacturer:
Atmel
Quantity:
10 000
Table 29-18. JTAG Programming Instruction (Continued)
Notes:
2549M–AVR–09/10
Instruction
8d. Read Fuse Low Byte
8e. Read Lock Bits
8f. Read Fuses and Lock Bits
9a. Enter Signature Byte Read
9b. Load Address Byte
9c. Read Signature Byte
10a. Enter Calibration Byte Read
10b. Load Address Byte
10c. Read Calibration Byte
11a. Load No Operation Command
1. This command sequence is not required if the seven MSB are correctly set by the previous command sequence (which is
2. Repeat until o = “1”.
3. Set bits to “0” to program the corresponding Fuse, “1” to unprogram the Fuse.
4. Set bits to “0” to program the corresponding Lock bit, “1” to leave the Lock bit unchanged.
5. “0” = programmed, “1” = unprogrammed.
6. The bit mapping for Fuses Extended byte is listed in
7. The bit mapping for Fuses High byte is listed in
8. The bit mapping for Fuses Low byte is listed in
9. The bit mapping for Lock bits byte is listed in
10. Address bits exceeding PCMSB and EEAMSB
11. All TDI and TDO sequences are represented by binary digits (0b...).
normally the case).
Set (Continued)
o = data out, i = data in, x = don’t care
(9)
(8)
a = address high bits, b = address low bits, c = address extended bits, H = 0 - Low byte, 1 - High Byte,
TDI Sequence
0110010_00000000
0110011_00000000
0110110_00000000
0110111_00000000
0111010_00000000
0111110_00000000
0110010_00000000
0110110_00000000
0110111_00000000
0000011_bbbbbbbb
0110010_00000000
0110011_00000000
0000011_bbbbbbbb
0110110_00000000
0110111_00000000
0100011_00000000
0110011_00000000
0100011_00001000
0100011_00001000
Table 29-1 on page
Table 29-5 on page
(Table 29-7 on page 338
Table 29-4 on page
Table 29-3 on page
ATmega640/1280/1281/2560/2561
335.
337.
337.
TDO Sequence
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxoooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
and
336.
Table 29-8 on page
338) are don’t care.
Notes
(5)
(5)
Fuse Ext. byte
Fuse High byte
Fuse Low byte
Lock bits
361

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