ATMEGA644V-10MU Atmel, ATMEGA644V-10MU Datasheet - Page 83
ATMEGA644V-10MU
Manufacturer Part Number
ATMEGA644V-10MU
Description
IC AVR MCU FLASH 64K 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Specifications of ATMEGA644V-10MU
Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA644V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
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2593N–AVR–07/10
Table 12-14. Overriding Signals for Alternate Functions in PD3:PD0
Note:
Signal Name
PUOE
PUOV
DDOE
DDOV
PVOE
PVOV
DIEOE
DIEOV
DI
AIO
1. When enabled, the 2-wire Serial Interface enables Slew-Rate controls on the output pins PD0
and PD1. This is not shown in this table. In addition, spike filters are connected between the
AIO outputs shown in the port figure and the digital logic of the TWI module.
PD3/INT1/
PCINT27
0
0
0
0
0
0
INT1 ENABLE
PCINT27 • PCIE3
1
INT1 INPUT
PCINT27 INPUT
–
PD2/INT0/
PCINT26
PORTD2 • PUD
RXEN1
0
0
0
INT2 ENABLE
PCINT26 • PCIE3
1
INT0 INPUT
PCINT27 INPUT
–
PD1/TXD0/
PCINT25
TXEN
PORTD1 • PUD
TXEN
SDA_OUT
TWEN
0
INT1 ENABLE
PCINT25 • PCIE3
1
TXD
PCINT25 INPUT
–
(1)
ATmega644
PD0/RXD0/
PCINT27
RXEN
PORTD0 • PUD
RXEN
SCL_OUT
TWEN
0
INT0 ENABLE
PCINT24 • PCIE3
1
RXD
PCINT24 INPUT
–
83
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