ATMEGA644V-10MU Atmel, ATMEGA644V-10MU Datasheet - Page 310

IC AVR MCU FLASH 64K 44-QFN

ATMEGA644V-10MU

Manufacturer Part Number
ATMEGA644V-10MU
Description
IC AVR MCU FLASH 64K 44-QFN
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA644V-10MU

Core Processor
AVR
Core Size
8-Bit
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
32
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
44-VQFN Exposed Pad
Package
44QFN EP
Device Core
AVR
Family Name
ATmega
Maximum Speed
10 MHz
Operating Supply Voltage
2.5|3.3|5 V
Data Bus Width
8 Bit
Number Of Programmable I/os
32
Interface Type
JTAG/SPI/TWI/USART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Processor Series
ATMEGA64x
Core
AVR8
Data Ram Size
4 KB
Maximum Clock Frequency
20 MHz
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
- 40 C
For Use With
ATSTK600-TQFP44 - STK600 SOCKET/ADAPTER 44-TQFPATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRISP2 - PROGRAMMER AVR IN SYSTEM
Lead Free Status / RoHS Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA644V-10MU
Manufacturer:
ATMEL/爱特梅尔
Quantity:
20 000
Table 25-18. JTAG Programming Instruction (Continued)
Notes:
310
Instruction
8e. Read Lock Bits
8f. Read Fuses and Lock Bits
9a. Enter Signature Byte Read
9b. Load Address Byte
9c. Read Signature Byte
10a. Enter Calibration Byte Read
10b. Load Address Byte
10c. Read Calibration Byte
11a. Load No Operation Command
1. This command sequence is not required if the seven MSB are correctly set by the previous command sequence (which is
2. Repeat until o = “1”.
3. Set bits to “0” to program the corresponding Fuse, “1” to unprogram the Fuse.
4. Set bits to “0” to program the corresponding Lock bit, “1” to leave the Lock bit unchanged.
5. “0” = programmed, “1” = unprogrammed.
6. The bit mapping for Fuses Extended byte is listed in
7. The bit mapping for Fuses High byte is listed in
8. The bit mapping for Fuses Low byte is listed in
9. The bit mapping for Lock bits byte is listed in
10. Address bits exceeding PCMSB and EEAMSB
11. All TDI and TDO sequences are represented by binary digits (0b...).
ATmega644
normally the case).
Set (Continued)
o = data out, i = data in, x = don’t care
(9)
a = address high bits, b = address low bits, c = address extended bits, H = 0 - Low byte, 1 - High Byte,
TDI Sequence
0110110_00000000
0110111_00000000
0111010_00000000
0111110_00000000
0110010_00000000
0110110_00000000
0110111_00000000
0100011_00001000
0000011_bbbbbbbb
0110010_00000000
0110011_00000000
0100011_00001000
0000011_bbbbbbbb
0110110_00000000
0110111_00000000
0100011_00000000
0110011_00000000
Table 25-1 on page 284
Table 25-5 on page 286
(Table 25-7
Table 25-4 on page 286
Table 25-3 on page 285
and
Table
25-8) are don’t care
TDO Sequence
xxxxxxx_xxxxxxxx
xxxxxxx_xxoooooo
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
xxxxxxx_oooooooo
xxxxxxx_xxxxxxxx
xxxxxxx_xxxxxxxx
Notes
(5)
(5)
Fuse Ext. byte
Fuse High byte
Fuse Low byte
Lock bits
2593N–AVR–07/10

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