ATMEGA325A-MU Atmel, ATMEGA325A-MU Datasheet - Page 328

• Manufacturer Part Number: ATMEGA325A-MU
• Description: IC MCU AVR 32K FLASH 64VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA325A-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

27.9
328
SPI Timing Characteristics
ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/645
See
Table 27-18. SPI Timing Parameters
Note:
Figure 27-4. SPI Interface Timing Requirements (Master Mode)
10
11
12
13
14
15
16
17
18
1
2
3
4
5
6
7
8
9
Figure 27-4 on page 328
(Data Output)
(Data Input)
(CPOL = 0)
(CPOL = 1)
Description
1. In SPI Programming mode the minimum SCK high/low period is:
- 2 t
- 3 t
MISO
MOSI
SS high to tri-state
SCK
SCK
SCK to out high
SCK high/low
SCK to SS high
SS
SS low to SCK
Rise/Fall time
Rise/Fall time
SCK high/low
SS low to out
CLCL
CLCL
SCK period
Out to SCK
SCK period
SCK to out
SCK to out
Setup
Setup
Hold
Hold
for f
for f
CK
CK
< 12MHz
> 12MHz
6
4
(1)
MSB
5
MSB
and
Figure 27-5 on page 329
Master
Master
Master
Master
Master
Master
Master
Master
Mode
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
Slave
7
...
20 • t
4 • t
2 • t
...
Min
10
t
20
ck
ck
ck
ck
for details.
See
50% duty cycle
2
0.5 • t
Table 18-5
Typ
3.6
1.6
10
10
10
10
15
15
10
LSB
1
sck
LSB
2
3
8
Max
8285B–AVR–03/11
ns
µs
ns