ATMEGA325A-MU Atmel, ATMEGA325A-MU Datasheet - Page 19

• Manufacturer Part Number: ATMEGA325A-MU
• Description: IC MCU AVR 32K FLASH 64VQFN
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA325A-MU

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 32KB (16K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

7.2
8285B–AVR–03/11
SRAM Data Memory
ATmega165A/165PA/325A/325PA/3250A/3250PA/6
Figure 7-1.
Figure 7-2 on page 20
The ATmega165A/165PA/325A/325PA/3250A/3250PA/645A/645P/6450A/6450P is a complex
microcontroller with more peripheral units than can be supported within the 64 locations
reserved in the Opcode for the IN and OUT instructions. For the Extended I/O space from 0x60 -
0xFF in SRAM, only the ST/STS/STD and LD/LDS/LDD instructions can be used.
The lower 1,280/2,304/4,352 data memory locations address both the Register File, the I/O
memory, Extended I/O memory, and the internal data SRAM. The first 32 locations address the
Register File, the next 64 location the standard I/O memory, then 160 locations of Extended I/O
memory, and the next 1024/2,048/4,096 locations address the internal data SRAM.
The five different addressing modes for the data memory cover: Direct, Indirect with Displace-
ment, Indirect, Indirect with Pre-decrement, and Indirect with Post-increment. In the Register
File, registers R26 to R31 feature the indirect addressing pointer registers.
The direct addressing reaches the entire data space.
The Indirect with Displacement mode reaches 63 address locations from the base address given
by the Y- or Z-register.
When using register indirect addressing modes with automatic pre-decrement and post-incre-
ment, the address registers X, Y, and Z are decremented or incremented.
The 32 general purpose working registers, 64 I/O Registers, 160 Extended I/O Registers, and
the 1,024/2,048/4,096 bytes of internal data SRAM in the are all accessible through all these
addressing modes. The Register File is described in
13.
Program Memory Map
shows how the SRAM Memory is organized.
Application Flash Section
Boot Flash Section
Program Memory
0x0000
0x1FFF/0x3FFF/0x7FFF
”General Purpose Register File” on page
19