ATXMEGA16A4-CU Atmel, ATXMEGA16A4-CU Datasheet - Page 70

• Manufacturer Part Number: ATXMEGA16A4-CU
• Description: MCU AVR 16+4KB FLASH 49VFBGA
• Manufacturer: Atmel
• Series: AVR® XMEGAr

Specifications of ATXMEGA16A4-CU

• Core Processor: AVR
• Core Size: 8/16-Bit
• Speed: 32MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 34
• Program Memory Size: 16KB (8K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 1K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 1.6 V ~ 3.6 V
• Data Converters: A/D 12x12b, D/A 2x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 49-VFBGA
• Processor Series: ATXMEGA16x
• Core: AVR8
• Data Bus Width: 8 bit, 16 bit
• Data Ram Size: 2 KB
• Interface Type: I2C/SPI/USART
• Maximum Clock Frequency: 32 MHz
• Number Of Programmable I/os: 34
• Number Of Timers: 5
• Operating Supply Voltage: 1.6 V to 3.6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR, EWAVR-BL
• Development Tools By Supplier: ATAVRDRAGON, ATAVRISP2, ATAVRONEKIT
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12-ch x 12-bit
• On-chip Dac: 2-ch x 12-bit
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAG770-1004 - ISP 4PORT FOR ATMEL AVR MCU SPI
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

6.7.2
8077H–AVR–12/09
QDEC Setup
Figure 6-4.
Figure 6-4
QDPH90 are the two quadrature signals. When QDPH90 leads QDPH0, the rotation is defined
as positive or forward. When QDPH0 leads QDPH90, the rotation is defined as negative, or
reverse. The concatenation of the two phase signals is called the quadrature state or the phase
state.
In order to know the absolute rotary displacement a third index signal (QDINDX) can be used.
This gives an indication once per revolution.
For a full QDEC setup the following is required:
The following procedure should be used for QDEC setup:
• I/O port pins - quadrature signal input
• The Event System - quadrature decoding
• A Timer/Counter - up, down and optional index count
• Choose two successive pins on a port as QDEC phase inputs.
• Set pin direction for QDPH0 and QDPH90 as input.
• Set pin configuration for QDPH0 and QDPH90 to low level sense.
• Select QDPH0 pin as multiplexer input for an event channel, n.
• Enable quadrature decoding and digital filtering in the Event Channel.
• Optional:
• Set quadrature decoding as event action for a Timer/Counter.
• Select Event Channel n as event source the Timer/Counter.
a. Setup QDEC index (QINDX).
b. Select a third pin for QINDX input.
c. Set pin direction for QINDX as input.
d. Set pin configuration for QINDX to sense both edges.
e. Select QINDX as multiplexer input for Event Channel n+1
f.
g. Select the Index Recognition mode for Event Channel n+1.
Set the Quadrature Index Enable bit in Event Channel n+1.
shows typical quadrature signals from a rotary encoder. The signals QDPH0 and
Quadrature signals from a rotary encoder
Forward Direction
Backward
Direction
QDPH90
QDPH90
QDINDX
QDINDX
QDPH0
QDPH0
00
01
1 cycle / 4 states
10
11
11
10
01
00
XMEGA A
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