ATMEGA649P-MUR Atmel, ATMEGA649P-MUR Datasheet - Page 307

• Manufacturer Part Number: ATMEGA649P-MUR
• Description: AVR, 64KB FLASH, 2KB EE, 4KB SRA
• Manufacturer: Atmel
• Series: AVR® ATmegar

Specifications of ATMEGA649P-MUR

• Core Processor: AVR
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: SPI, UART/USART, USI
• Peripherals: Brown-out Detect/Reset, LCD, POR, PWM, WDT
• Number Of I /o: 54
• Program Memory Size: 64KB (32K x 16)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 4K x 8
• Voltage - Supply (vcc/vdd): 1.8 V ~ 5.5 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN Exposed Pad
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

26.8.13.2
In
Table 26-9.
8284A–AVR–10/10
BOOTSZ1
Table 26-9
1
1
0
0
ATmega329A/329PA/3290A/3290PA/649A/649P/6490A/6490P
through
BOOTSZ0
Boot Size Configuration (ATmega329A/329PA/3290A/3290PA/649A/649P/6490A/6490P)
1
0
1
0
Table
Table 26-7.
Note:
Table 26-8.
Notes:
Section
Read-While-Write section (RWW)
No Read-While-Write section (NRWW)
Variable
PCMSB
PAGEMSB
ZPCMSB
ZPAGEMSB
PCPAGE
PCWORD
26-11, the parameters used in the description of the Self-Programming are given.
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
1024 words
2048 words
Boot Size
256 words
512 words
1. For details about these two section, see
1. Z15:Z14: always ignored
296
Z0: should be zero for all SPM commands, byte select for the LPM instruction.
See
Z-pointer during Self-Programming.
Read-While-Write Limit (ATmega169A/169PA)
Explanation of different variables used in
ping to the Z-pointer (ATmega169A/169PA)
and
PC[12:6]
”Addressing the Flash During Self-Programming” on page 300
PC[5:0]
12
5
”RWW – Read-While-Write Section” on page
Pages
16
32
4
8
Corresponding
Application
Flash Section
0x0000-0x3EFF
0x0000-0x3DFF
0x0000-0x3BFF
0x0000-0x37FF
Z-value
Z13:Z7
Z6:Z1
Z13
Z6
Most significant bit in the Program Counter.
(The Program Counter is 13 bits PC[12:0])
Most significant bit which is used to address the words
within one page (64 words in a page requires six bits PC
[5:0]).
Bit in Z-register that is mapped to PCMSB. Because Z0
is not used, the ZPCMSB equals PCMSB + 1.
Bit in Z-register that is mapped to PAGEMSB. Because
Z0 is not used, the ZPAGEMSB equals PAGEMSB + 1.
Program Counter page address: Page select, for Page
Erase and Page Write
Program Counter word address: Word select, for filling
temporary buffer (must be zero during Page Write
operation)
”NRWW – No Read-While-Write Section” on page
Boot Loader
Flash Section
0x3F00-0x3FFF
0x3E00-0x3FFF
0x3C00-0x3FFF
0x3800-0x3FFF
Pages
112
16
Figure 26-3 on page 301
(1)
296.
(1)
Description
End
Application
Section
0x3EFF
0x3DFF
0x3BFF
0x37FF
Address
0x0000 - 0x1BFF
0x1C00 - 0x1FFF
for details about the use of
(1)
Boot Reset
Address
(Start
Boot Loader
Section)
0x3F00
0x3E00
0x3C00
0x3800
and the map-
307