ATMEGA649P-MUR Atmel, ATMEGA649P-MUR Datasheet - Page 292

AVR, 64KB FLASH, 2KB EE, 4KB SRA

ATMEGA649P-MUR

Manufacturer Part Number
ATMEGA649P-MUR
Description
AVR, 64KB FLASH, 2KB EE, 4KB SRA
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheets

Specifications of ATMEGA649P-MUR

Core Processor
AVR
Core Size
8-Bit
Speed
16MHz
Connectivity
SPI, UART/USART, USI
Peripherals
Brown-out Detect/Reset, LCD, POR, PWM, WDT
Number Of I /o
54
Program Memory Size
64KB (32K x 16)
Program Memory Type
FLASH
Eeprom Size
2K x 8
Ram Size
4K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN Exposed Pad
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
25.7
8284A–AVR–10/10
Boundary-scan Description Language Files
Table 25-8.
Note:
Boundary-scan Description Language (BSDL) files describe Boundary-scan capable devices in
a standard format used by automated test-generation software. The order and function of bits in
the Boundary-scan Data Register are included in this description. A BSDL file for
ATmega169A/169PA/329A/329PA/3290A/3290PA/649A/649P/6490A/6490P is available.
Bit Number
27
26
25
24
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
ATmega169A/169PA/329A/329PA/649A/649P/3290A/3290PA/6490A/6490P
1. PRIVATE_SIGNAL1 should always be scanned in as zero.
ATmega3290A/3290PA/6490A/6490P Boundary-scan Order, 100-pin
Signal Name
PA1.Pull-up_Enable
PA0.Data
PA0.Control
PA0.Pull-up_Enable
PH4.Data
PH4.Control
PH4.Pull-up_Enable
PH5.Data
PH5.Control
PH5.Pull-up_Enable
PH6.Data
PH6.Control
PH6.Pull-up_Enable
PH7.Data
PH7.Control
PH7.Pull-up_Enable
PF3.Data
PF3.Control
PF3.Pull-up_Enable
PF2.Data
PF2.Control
PF2.Pull-up_Enable
PF1.Data
PF1.Control
PF1.Pull-up_Enable
PF0.Data
PF0.Control
PF0.Pull-up_Enable
Module
Port H
Port F
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