ATMEGA16HVA-4CKU Atmel, ATMEGA16HVA-4CKU Datasheet - Page 109
ATMEGA16HVA-4CKU
Manufacturer Part Number
ATMEGA16HVA-4CKU
Description
MCU AVR 16K FLASH 4MHZ 36-LGA
Manufacturer
Atmel
Series
AVR® ATmegar
Datasheet
1.ATMEGA16HVA-4CKU.pdf
(196 pages)
Specifications of ATMEGA16HVA-4CKU
Core Processor
AVR
Core Size
8-Bit
Speed
4MHz
Connectivity
SPI
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
7
Program Memory Size
16KB (8K x 16)
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
512 x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 9 V
Data Converters
A/D 5x12b
Oscillator Type
External
Operating Temperature
-20°C ~ 85°C
Package / Case
36-LGA
Processor Series
ATMEGA16x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
512 B
Interface Type
SPI
Maximum Clock Frequency
4 MHz
Number Of Programmable I/os
6
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATAVRSB200, ATAVRSB201
Minimum Operating Temperature
- 20 C
On-chip Adc
12 bit, 5 Channel
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32ATSTK500 - PROGRAMMER AVR STARTER KIT
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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19.7.2
8024A–AVR–04/08
CADCSRB - CC-ADC Control and Status Register B
• Bits 7 - Res: Reserved
This bit is reserved bit and will always read as zero.
• Bit 6 - CADACIE: CC-ADC Accumulate Current Interrupt Enable
When the CADACIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Accumulate Current Interrupt is enabled.
• Bit 5 - CADRCIE: CC-ADC Regular Current Interrupt Enable
When the CADRCIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Regular Current Interrupt is enabled.
• Bit 4 - CADICIE: CC-ADC Instantaneous Current Interrupt Enable
When the CADICIE bit is set (one), and the I-bit in the Status Register is set (one), the CC-ADC
Instantaneous Current Interrupt is enabled.
• Bits 3 - Res: Reserved
This bit is reserved bit and will always read as zero.
• Bit 2 - CADACIF: CC-ADC Accumulate Current Interrupt Flag
The CADACIF bit is set (one) after the Accumulate Current conversion has completed. The
CCADC Accumulate Current Interrupt is executed if the CADACIE bit and the I-bit in SREG are
set (one). CADACIF is cleared by hardware when executing the corresponding Interrupt Han-
dling Vector. Alternatively, CADACIF is cleared by writing a logic one to the flag.
• Bit 1 - CADRCIF: CC-ADC Regular Current Interrupt Flag
The CADRCIF bit is set (one) when the absolute value of the result of the last CC-ADC conver-
sion is greater than, or equal to, the compare values set by the CC-ADC Regular Current Level
Register.
• Bit 0 - CADICIF: CC-ADC Instantaneous Current Interrupt Flag
The CADICIF bit is set (one) when a CC-ADC Instantaneous Current conversion is completed.
The CC-ADC Instantaneous Current Interrupt is executed if the CADICIE bit and the I-bit in
SREG are set (one). CADICIF is cleared by hardware when executing the corresponding Inter-
rupt Handling vector. Alternatively, CADICIF is cleared by writing a logic one to the flag.
Bit
(0xE5)
Read/Write
Initial Value
R
7
0
–
CADACIE
R/W
6
0
CADRCIE
R
5
0
CADICIE
R/W
4
0
R
3
0
–
ATmega8HVA/16HVA
CADACIF
R/W
2
0
CADRCIF
R/W
1
0
CADICIF
R/W
0
0
CADCSRB
109
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