PIC18F65K22-I/MRRSL Microchip Technology, PIC18F65K22-I/MRRSL Datasheet - Page 407

MCU PIC 32K FLASH MEM XLP 64QFN

PIC18F65K22-I/MRRSL

Manufacturer Part Number
PIC18F65K22-I/MRRSL
Description
MCU PIC 32K FLASH MEM XLP 64QFN
Manufacturer
Microchip Technology
Series
PIC® XLP™ 18Fr

Specifications of PIC18F65K22-I/MRRSL

Core Size
8-Bit
Program Memory Size
32KB (16K x 16)
Core Processor
PIC
Speed
64MHz
Connectivity
I²C, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, LVD, POR, PWM, WDT
Number Of I /o
53
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 16x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Controller Family/series
PIC18
No. Of I/o's
53
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
64MHz
No. Of Timers
8
Processor Series
PIC18F
Core
PIC
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SPI
Maximum Clock Frequency
64 MHz
Number Of Programmable I/os
53
Number Of Timers
8
Operating Supply Voltage
1.8 V to 5.5 V
Maximum Operating Temperature
+ 125 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
Minimum Operating Temperature
- 40 C
On-chip Adc
12 bit, 16 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
REGISTER 28-5:
 2010 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7
bit 6
bit 5-4
bit 3
bit 2-1
bit 0
Note 1:
WAIT
U-0
(1)
This feature is only available on 80-pin devices.
WAIT: External Bus Wait Enable bit
1 = Wait states on the external bus are disabled
0 = Wait states on the external bus are enabled and selected by MEMCON <5:4>
BW: Data Bus Width Select bit
1 = 16-Bit Data Width modes
0 = 8-Bit Data Width modes
ABW: External Memory Bus Configuration bits
11 = 20-Bit Address mode
10 = 16-Bit Address mode
01 = 12-Bit Address mode
00 = 8-Bit Address mode (Microcontroller mode)
EASHFT: External Address Bus Shift Enable bit
1 = Address shifting is enabled; external address is shifted to start at 000000h
0 = Address shifting is disabled; external address bus reflects the PC value
Unimplemented: Read as ‘ 0 ’
RTCOSC: RTCC Reference Clock Select bit
1 = RTCC uses SOSC as the reference clock
0 = RTCC uses LF-INTOSC as the reference clock
BW
U-0
CONFIG3L: CONFIGURATION REGISTER 3 LOW (BYTE ADDRESS 300004h)
(1)
P = Programmable bit
W = Writable bit
‘1’ = Bit is set
ABW1
U-0
(1)
(1)
ABW0
U-0
Preliminary
(1)
(1)
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
EASHFT
PIC18F87K22 FAMILY
(1)
U-0
(1)
(1)
U-0
x = Bit is unknown
U-0
DS39960B-page 407
RTCOSC
R/P-1
bit 0

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