PIC18LF1330-I/SO Microchip Technology, PIC18LF1330-I/SO Datasheet - Page 187

• Manufacturer Part Number: PIC18LF1330-I/SO
• Description: IC PIC MCU FLASH 4KX16 18SOIC
• Manufacturer: Microchip Technology
• Series: PIC® 18Fr

Specifications of PIC18LF1330-I/SO

• Core Size: 8-Bit
• Program Memory Size: 8KB (4K x 16)
• Oscillator Type: Internal
• Core Processor: PIC
• Speed: 40MHz
• Connectivity: UART/USART
• Peripherals: Brown-out Detect/Reset, LVD, POR, PWM, WDT
• Number Of I /o: 16
• Program Memory Type: FLASH
• Eeprom Size: 128 x 8
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2 V ~ 5.5 V
• Data Converters: A/D 4x10b
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 18-SOIC (7.5mm Width)
• Controller Family/series: PIC18
• No. Of I/o's: 16
• Eeprom Memory Size: 128Byte
• Ram Memory Size: 256Byte
• Cpu Speed: 40MHz
• No.: RoHS Compliant
• Processor Series: PIC18LF
• Core: PIC
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: EUSART
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 16
• Number Of Timers: 2
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52715-96, 52716-328, 52717-734, 52712-325, EWPIC18
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DV164136
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 10 bit, 4 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant

19.0
PIC18F1230/1330 devices have a Low-Voltage
Detect module (LVD). This is a programmable circuit
that allows the user to specify the device voltage trip
point. If the device experiences an excursion past the
trip point, an interrupt flag is set. If the interrupt is
enabled, the program execution will branch to the
interrupt vector address and the software can then
respond to the interrupt.
REGISTER 19-1:
 2009 Microchip Technology Inc.
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 7-6
bit 5
bit 4
bit 3-0
Note 1:
U-0
—
LOW-VOLTAGE DETECT (LVD)
See Table 23-4 in Section 23.0 “Electrical Characteristics” for the specifications.
Unimplemented: Read as ‘0’
IRVST: Internal Reference Voltage Stable Flag bit
1 = Indicates that the voltage detect logic will generate the interrupt flag at the specified voltage
0 = Indicates that the voltage detect logic will not generate the interrupt flag at the specified voltage
LVDEN: Low-Voltage Detect Power Enable bit
1 = LVD enabled
0 = LVD disabled
LVDL3:LVDL0: Voltage Detection Limit bits
1111 = Reserved
1110 = Maximum setting
.
.
.
0000 = Minimum setting
trip point
trip point and the LVD interrupt should not be enabled
U-0
—
LVDCON: LOW-VOLTAGE DETECT CONTROL REGISTER
W = Writable bit
‘1’ = Bit is set
IRVST
R-0
LVDEN
R/W-0
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
(1)
LVDL3
R/W-0
The Low-Voltage Detect Control register (Register 19-1)
completely controls the operation of the LVD module.
This allows the circuitry to be “turned off” by the user
under software control, which minimizes the current
consumption for the device.
The block diagram for the LVD module is shown in
Figure 19-1.
(1)
PIC18F1230/1330
LVDL2
R/W-1
(1)
x = Bit is unknown
LVDL1
R/W-0
(1)
DS39758D-page 187
LVDL0
R/W-1
(1)
bit 0